Home | History | Annotate | Download | only in arm64

Lines Matching defs:shift_amount

2293   DCHECK(operand.IsShiftedRegister() && (operand.shift_amount() == 0));
2420 DCHECK(operand.IsShiftedRegister() && (operand.shift_amount() == 0));
2465 unsigned shift_amount) {
2468 lsl(rd, rn, shift_amount);
2471 lsr(rd, rn, shift_amount);
2474 asr(rd, rn, shift_amount);
2477 ror(rd, rn, shift_amount);
2528 DCHECK(rn.Is64Bits() || (rn.Is32Bits() && is_uint5(operand.shift_amount())));
2531 ShiftDP(operand.shift()) | ImmDPShift(operand.shift_amount()) |
2544 ExtendMode(operand.extend()) | ImmExtendShift(operand.shift_amount()) |
2577 unsigned shift_amount = addr.shift_amount();
2586 DCHECK((shift_amount == 0) ||
2587 (shift_amount == static_cast<unsigned>(CalcLSDataSize(op))));
2589 ExtendMode(ext) | ImmShiftLS((shift_amount > 0) ? 1 : 0));