Lines Matching refs:Emit
126 selector->Emit(opcode, g.DefineAsRegister(node),
135 selector->Emit(opcode, g.DefineAsRegister(node),
143 selector->Emit(opcode, g.DefineAsRegister(node),
216 selector->Emit(opcode, output_count, outputs, input_count, inputs);
276 Emit(opcode | AddressingModeField::encode(kMode_MRI),
280 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
282 // Emit desired load opcode, using temp addr_reg.
283 Emit(opcode | AddressingModeField::encode(kMode_MRI),
330 Emit(code, 0, nullptr, input_count, inputs, temp_count, temps);
364 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
369 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
371 // Emit desired store opcode, using temp addr_reg.
372 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
409 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node()));
411 Emit(kMipsExt, g.DefineAsRegister(node),
427 Emit(kMipsIns, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
448 Emit(kMipsNor, g.DefineAsRegister(node),
457 Emit(kMipsNor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
484 Emit(kMipsShl, g.DefineAsRegister(node),
510 Emit(kMipsExt, g.DefineAsRegister(node),
530 Emit(kMipsSeh, g.DefineAsRegister(node),
534 Emit(kMipsSeb, g.DefineAsRegister(node),
561 selector->Emit(pair_opcode, 2, outputs, 4, inputs);
563 // The high word of the result is not used, so we emit the standard 32 bit
565 selector->Emit(single_opcode, g.DefineSameAsFirst(node),
615 selector->Emit(opcode, output_count, outputs, 3, inputs, temp_count, temps);
646 Emit(kMipsByteSwap32, g.DefineAsRegister(node),
652 Emit(kMipsCtz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
658 Emit(kMipsPopcnt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
672 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
684 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.right().node()),
705 Emit(kMipsShl | AddressingModeField::encode(kMode_None),
711 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
718 Emit(kMipsShl | AddressingModeField::encode(kMode_None), temp,
721 Emit(kMipsSub | AddressingModeField::encode(kMode_None),
737 Emit(kMipsMulHighU, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
745 Emit(kMipsDiv, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
753 Emit(kMipsDivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
761 Emit(kMipsMod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
769 Emit(kMipsModU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
817 Emit(kMipsFloorWD, g.DefineAsRegister(node),
821 Emit(kMipsCeilWD, g.DefineAsRegister(node),
825 Emit(kMipsRoundWD, g.DefineAsRegister(node),
829 Emit(kMipsTruncWD, g.DefineAsRegister(node),
841 Emit(kMipsFloorWS, g.DefineAsRegister(node),
845 Emit(kMipsCeilWS, g.DefineAsRegister(node),
849 Emit(kMipsRoundWS, g.DefineAsRegister(node),
853 Emit(kMipsTruncWS, g.DefineAsRegister(node),
857 Emit(kMipsTruncWS, g.DefineAsRegister(node),
863 Emit(kMipsTruncWS, g.DefineAsRegister(node),
888 Emit(kMipsCvtSW, g.DefineAsRegister(node),
910 Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node),
923 Emit(kMipsMaddS, g.DefineAsRegister(node),
931 Emit(kMipsMaddS, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
948 Emit(kMipsMaddD, g.DefineAsRegister(node),
956 Emit(kMipsMaddD, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
973 Emit(kMipsMsubS, g.DefineAsRegister(node),
989 Emit(kMipsMsubD, g.DefineAsRegister(node),
1020 Emit(kMipsModD, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12),
1026 Emit(kMipsFloat32Max, g.DefineAsRegister(node),
1032 Emit(kMipsFloat64Max, g.DefineAsRegister(node),
1038 Emit(kMipsFloat32Min, g.DefineAsRegister(node),
1044 Emit(kMipsFloat64Min, g.DefineAsRegister(node),
1123 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f2),
1131 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12))
1142 Emit(kArchPrepareCallCFunction |
1150 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
1159 Emit(kMipsStackClaim, g.NoOutput(),
1165 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
1216 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1220 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1222 // Emit desired load opcode, using temp addr_reg.
1223 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1269 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1274 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1276 // Emit desired store opcode, using temp addr_reg.
1277 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1328 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1372 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1386 selector->Emit(opcode, g.NoOutput(), left, right,
1392 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
1395 selector->Emit(opcode, g.NoOutput(), left, right,
1593 // Continuation could not be combined with a compare, emit compare against 0.
1598 selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
1605 selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
1609 selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
1653 // Emit either ArchTableSwitch or ArchLookupSwitch.
1665 Emit(kMipsSub, index_operand, value_operand,
1781 Emit(kMipsFloat64ExtractLowWord32, g.DefineAsRegister(node),
1788 Emit(kMipsFloat64ExtractHighWord32, g.DefineAsRegister(node),
1797 Emit(kMipsFloat64InsertLowWord32, g.DefineSameAsFirst(node),
1806 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node),
1814 Emit(kMipsFloat64SilenceNaN, g.DefineSameAsFirst(node), g.UseRegister(left),
1840 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1844 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1846 // Emit desired load opcode, using temp addr_reg.
1847 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1875 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1880 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1882 // Emit desired store opcode, using temp addr_reg.
1883 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
