Lines Matching refs:instr_
2065 int32_t func = instr_.FunctionFieldRaw();
2066 uint32_t code = (func == BREAK) ? instr_.Bits(25, 6) : -1;
2069 if (instr_.InstructionBits() == rtCallRedirInstr) {
2070 Redirection* redirection = Redirection::FromSwiInstruction(instr_.instr());
2305 HandleStop(code, instr_.instr());
2548 ft = (instr_.FunctionFieldRaw() != MOVF) ? get_fpu_register_double(ft_reg())
2553 cc = instr_.FCccValue();
2555 switch (instr_.FunctionFieldRaw()) {
2614 int32_t rt_reg = instr_.RtValue();
2625 if (instr_.Bit(16)) { // Read Tf bit.
2947 switch (instr_.FunctionFieldRaw()) {
3043 cc = instr_.FCccValue();
3045 switch (instr_.FunctionFieldRaw()) {
3278 if (instr_.Bit(16)) { // Read Tf bit.
3440 instr_.FunctionFieldRaw()) {
3542 switch (instr_.RsFieldRaw()) {
3613 switch (instr_.FunctionFieldRaw()) {
3662 switch (instr_.FunctionFieldRaw()) {
3943 uint32_t cc = instr_.FBccValue();
3945 if (instr_.Bit(16)) { // Read Tf bit.
3968 switch (instr_.FunctionFieldRaw()) {
3991 switch (instr_.FunctionFieldRaw()) {
4016 int sa = instr_.SaFieldRaw() >> kSaShift;
4088 const uint8_t bp = instr_.Bp2Value();
4118 switch (instr_.OpcodeFieldRaw()) {
4143 Opcode op = instr_.OpcodeFieldRaw();
4144 int32_t rs_reg = instr_.RsValue();
4145 int32_t rs = get_register(instr_.RsValue());
4147 int32_t rt_reg = instr_.RtValue(); // Destination register.
4149 int16_t imm16 = instr_.Imm16Value();
4151 int32_t ft_reg = instr_.FtValue(); // Destination register.
4176 int16_t imm16 = this->instr_.Imm16Value();
4189 int16_t imm16 = this->instr_.Imm16Value();
4200 int32_t imm = this->instr_.ImmValue(bits);
4212 int32_t imm = this->instr_.ImmValue(bits);
4222 switch (instr_.RsFieldRaw()) {
4225 uint32_t cc = instr_.FBccValue();
4228 bool do_branch = (instr_.FBtrueValue()) ? cc_value : !cc_value;
4244 switch (instr_.RtFieldRaw()) {
4452 set_register(rt_reg, ReadH(rs + se_imm16, instr_.instr()));
4460 alu_out = ReadW(addr, instr_.instr());
4467 set_register(rt_reg, ReadW(rs + se_imm16, instr_.instr()));
4473 set_register(rt_reg, ReadHU(rs + se_imm16, instr_.instr()));
4481 alu_out = ReadW(addr, instr_.instr());
4491 WriteH(rs + se_imm16, static_cast<uint16_t>(rt), instr_.instr());
4499 uint32_t mem_value = ReadW(addr, instr_.instr()) & mask;
4501 WriteW(addr, mem_value, instr_.instr());
4505 WriteW(rs + se_imm16, rt, instr_.instr());
4511 uint32_t mem_value = ReadW(addr, instr_.instr());
4513 WriteW(addr, mem_value, instr_.instr());
4519 ReadW(rs + se_imm16, instr_.instr(), FLOAT));
4527 set_fpu_register_double(ft_reg, ReadD(rs + se_imm16, instr_
4531 WriteW(rs + se_imm16, get_fpu_register_word(ft_reg), instr_.instr());
4535 WriteD(rs + se_imm16, get_fpu_register_double(ft_reg), instr_.instr());
4541 int32_t imm21 = instr_.Imm21Value();
4553 int32_t imm19 = instr_.Imm19Value();
4602 SimInstruction simInstr = instr_;
4642 instr_ = instr;
4643 switch (instr_.InstructionType()) {
