Lines Matching defs:lui
160 // specially coded on MIPS means that it is a lui/ori instruction, and that is
586 return opcode == LUI;
1953 lui(at, (src.offset_ >> kLuiShift) & kImm16Mask);
1965 lui(at, (src.offset_ >> kLuiShift) & kImm16Mask);
1994 lui(at, hi);
2118 void Assembler::lui(Register rd, int32_t j) {
2120 GenInstrImmediate(LUI, zero_reg, rd, j);
2125 // This instruction uses same opcode as 'lui'. The difference in encoding is
2126 // 'lui' has zero reg. for rs field.
2128 GenInstrImmediate(LUI, rs, rt, j);
3462 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) &&
3490 // 0: lui(rd, (j.imm64_ >> 32) & kImm16Mask);
3495 // Patching the address must replace all the lui & ori instructions,
3518 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI &&
3523 // lui rt, upper-16.
3527 *p = LUI | (rt_code << kRtShift) | ((itarget >> 32) & kImm16Mask);
