Lines Matching refs:rN
2486 sf op 100100 N immr imms Rn Rd
2487 op=00: AND Rd|SP, Rn, #imm
2488 op=01: ORR Rd|SP, Rn, #imm
2489 op=10: EOR Rd|SP, Rn, #imm
2490 op=11: ANDS Rd|ZR, Rn, #imm
2807 x 0 0 01011 sh 0 Rm imm6 Rn Rd ADD Rd,Rn, sh(Rm,imm6)
2808 x 0 1 01011 sh 0 Rm imm6 Rn Rd ADDS Rd,Rn, sh(Rm,imm6)
2809 x 1 0 01011 sh 0 Rm imm6 Rn Rd SUB Rd,Rn, sh(Rm,imm6)
2810 x 1 1 01011 sh 0 Rm imm6 Rn Rd SUBS Rd,Rn, sh(Rm,imm6)
2819 UInt rN = INSN(9,5);
2828 assign(argL, getIRegOrZR(is64, rN));
2839 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN),
2850 x 0 0 11010 00 0 Rm 000000 Rn Rd ADC Rd,Rn,Rm
2851 x 0 1 11010 00 0 Rm 000000 Rn Rd ADCS Rd,Rn,Rm
2852 x 1 0 11010 00 0 Rm 000000 Rn Rd SBC Rd,Rn,Rm
2853 x 1 1 11010 00 0 Rm 000000 Rn Rd SBCS Rd,Rn,Rm
2861 UInt rN = INSN(9,5);
2874 assign(argL, getIRegOrZR(is64, rN));
2902 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN),
2915 x 00 01010 sh N Rm imm6 Rn Rd AND Rd,Rn, inv?(sh(Rm,imm6))
2916 x 01 01010 sh N Rm imm6 Rn Rd ORR Rd,Rn, inv?(sh(Rm,imm6))
2917 x 10 01010 sh N Rm imm6 Rn Rd EOR Rd,Rn, inv?(sh(Rm,imm6))
2918 x 11 01010 sh N Rm imm6 Rn Rd ANDS Rd,Rn, inv?(sh(Rm,imm6))
2927 UInt rN = INSN(9,5);
2935 assign(argL, getIRegOrZR(is64, rN));
2956 if (rN == 31/*zr*/ && sh == 0/*LSL*/ && imm6 == 0 && bN == 0) {
2961 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN),
2970 10011011 1 10 Rm 011111 Rn Rd UMULH Xd,Xn,Xm
2971 10011011 0 10 Rm 011111 Rn Rd SMULH Xd,Xn,Xm
2990 sf 00 11011 000 m 0 a n r MADD Rd,Rn,Rm,Ra d = a+m*n
2991 sf 00 11011 000 m 1 a n r MADD Rd,Rn,Rm,Ra d = a-m*n
3022 sf 00 1101 0100 mm cond 00 nn dd CSEL Rd,Rn,Rm
3023 sf 00 1101 0100 mm cond 01 nn dd CSINC Rd,Rn,Rm
3024 sf 10 1101 0100 mm cond 00 nn dd CSINV Rd,Rn,Rm
3025 sf 10 1101 0100 mm cond 01 nn dd CSNEG Rd,Rn,Rm
3026 In all cases, the operation is: Rd = if cond then Rn else OP(Rm)
3189 sf 1 111010010 imm5 cond 10 Rn 0 nzcv CCMP Rn, #imm5, #nzcv, cond
3190 sf 0 111010010 imm5 cond 10 Rn 0 nzcv CCMN Rn, #imm5, #nzcv, cond
3193 (CCMP) flags = if cond then flags-after-sub(Rn,imm5) else nzcv
3194 (CCMN) flags = if cond then flags-after-add(Rn,imm5) else nzcv
3229 sf 1 111010010 Rm cond 00 Rn 0 nzcv CCMP Rn, Rm, #nzcv, cond
3230 sf 0 111010010 Rm cond 00 Rn 0 nzcv CCMN Rn, Rm, #nzcv, cond
3232 (CCMP) flags = if cond then flags-after-sub(Rn,Rm) else nzcv
3233 (CCMN) flags = if cond then flags-after-add(Rn,Rm) else nzcv
3337 sf 10 1101 0110 00000 00010 0 n d CLZ Rd, Rn
3338 sf 10 1101 0110 00000 00010 1 n d CLS Rd, Rn
3385 sf 00 1101 0110 m 0010 00 n d LSLV Rd,Rn,Rm
3386 sf 00 1101 0110 m 0010 01 n d LSRV Rd,Rn,Rm
3387 sf 00 1101 0110 m 0010 10 n d ASRV Rd,Rn,Rm
3388 sf 00 1101 0110 m 0010 11 n d RORV Rd,Rn,Rm
3446 sf 00 1101 0110 m 00001 1 n d SDIV Rd,Rn,Rm
3447 sf 00 1101 0110 m 00001 0 n d UDIV Rd,Rn,Rm
4543 Rm is insn[20:16]. Rn is insn[9:5]. Rt is insn[4:0]. Log2 of
4760 (at-Rn-then-Rn=EA) | | |
4761 sz 111 00000 0 imm9 01 Rn Rt STR Rt, [Xn|SP], #simm9
4762 sz 111 00001 0 imm9 01 Rn Rt LDR Rt, [Xn|SP], #simm9
4764 (at-EA-then-Rn=EA)
4765 sz 111 00000 0 imm9 11 Rn Rt STR Rt, [Xn|SP, #simm9]!
4766 sz 111 00001 0 imm9 11 Rn Rt LDR Rt, [Xn|SP, #simm9]!
4769 sz 111 00000 0 imm9 00 Rn Rt STR Rt, [Xn|SP, #simm9]
4770 sz 111 00001 0 imm9 00 Rn Rt LDR Rt, [Xn|SP, #simm9]
4774 The case 'wback && Rn == Rt && Rt != 31' is disallowed. In the
4817 /* Normally rN would be updated after the transfer. However, in
4849 fmt_str = "%s %s, [%s], #%lld (at-Rn-then-Rn=EA)\n";
4852 fmt_str = "%s %s, [%s, #%lld]! (at-EA-then-Rn=EA)\n";
4855 fmt_str = "%s %s, [%s, #%lld] (at-Rn)\n";
4874 (at-Rn-then-Rn=EA)
4875 x0 101 0001 L imm7 Rt2 Rn Rt1 mmP Rt1,Rt2, [Xn|SP], #imm
4877 (at-EA-then-Rn=EA)
4878 x0 101 0011 L imm7 Rt2 Rn Rt1 mmP Rt1,Rt2, [Xn|SP, #imm]!
4881 x0 101 0010 L imm7 Rt2 Rn Rt1 mmP Rt1,Rt2, [Xn|SP, #imm]
4891 UInt rN = INSN(9,5);
4894 if ((bWBack && (rT1 == rN || rT2 == rN) && rN != 31)
4898 if (rN == 31) { /* FIXME generate stack alignment check */ }
4902 assign(tRN, getIReg64orSP(rN));
4920 /* Normally rN would be updated after the transfer. However, in
4933 && INSN(24,23) == BITS2(1,1) && rN == 31 && bL == 0;
4936 putIReg64orSP(rN, mkexpr(tEA));
4966 putIReg64orSP(rN, mkexpr(tEA));
4971 fmt_str = "%sp %s, %s, [%s], #%lld (at-Rn-then-Rn=EA)\n";
4974 fmt_str = "%sp %s, %s, [%s, #%lld]! (at-EA-then-Rn=EA)\n";
4977 fmt_str = "%sp %s, %s, [%s, #%lld] (at-Rn)\n";
4985 nameIReg64orSP(rN), simm7);
4994 (at-Rn-then-Rn=EA)
4995 01 101 0001 1 imm7 Rt2 Rn Rt1 LDPSW Rt1,Rt2, [Xn|SP], #imm
4997 (at-EA-then-Rn=EA)
4998 01 101 0011 1 imm7 Rt2 Rn Rt1 LDPSW Rt1,Rt2, [Xn|SP, #imm]!
5001 01 101 0010 1 imm7 Rt2 Rn Rt1 LDPSW Rt1,Rt2, [Xn|SP, #imm]
5009 UInt rN = INSN(9,5);
5012 if ((bWBack && (rT1 == rN || rT2 == rN) && rN != 31)
5016 if (rN == 31) { /* FIXME generate stack alignment check */ }
5020 assign(tRN, getIReg64orSP(rN));
5048 putIReg64orSP(rN, mkexpr(tEA));
5053 fmt_str = "ldpsw %s, %s, [%s], #%lld (at-Rn-then-Rn=EA)\n";
5056 fmt_str = "ldpsw %s, %s, [%s, #%lld]! (at-EA-then-Rn=EA)\n";
5059 fmt_str = "ldpsw %s, %s, [%s, #%lld] (at-Rn)\n";
5066 nameIReg64orSP(rN), simm7);
5096 11 111000011 Rm option S 10 Rn Rt LDR Xt, [Xn|SP, R<m>{ext/sh}]
5097 10 111000011 Rm option S 10 Rn Rt LDR Wt, [Xn|SP, R<m>{ext/sh}]
5098 01 111000011 Rm option S 10 Rn Rt LDRH Wt, [Xn|SP, R<m>{ext/sh}]
5099 00 111000011 Rm option S 10 Rn Rt LDRB Wt, [Xn|SP, R<m>{ext/sh}]
5101 11 111000001 Rm option S 10 Rn Rt STR Xt, [Xn|SP, R<m>{ext/sh}]
5102 10 111000001 Rm option S 10 Rn Rt STR Wt, [Xn|SP, R<m>{ext/sh}]
5103 01 111000001 Rm option S 10 Rn Rt STRH Wt, [Xn|SP, R<m>{ext/sh}]
5104 00 111000001 Rm option S 10 Rn Rt STRB Wt, [Xn|SP, R<m>{ext/sh}]
5223 /* (at-Rn-then-Rn=EA)
5229 (at-EA-then-Rn=EA)
5235 transfer-at-Rn when [11]==0, at EA when [11]==1
5396 (at-Rn-then-Rn=EA)
5402 (at-EA-then-Rn=EA)
5447 /* Normally rN would be updated after the transfer. However, in
5491 fmt_str = "%sp %s, %s, [%s], #%lld (at-Rn-then-Rn=EA)\n";
5494 fmt_str = "%sp %s, %s, [%s, #%lld]! (at-EA-then-Rn=EA)\n";
5497 fmt_str = "%sp %s, %s, [%s, #%lld] (at-Rn)\n";
5500 fmt_str = "%snp %s, %s, [%s, #%lld] (at-Rn)\n";
5515 00 111100 011 Rm option S 10 Rn Rt LDR Bt, [Xn|SP, R<m>{ext/sh}]
5516 01 111100 011 Rm option S 10 Rn Rt LDR Ht, [Xn|SP, R<m>{ext/sh}]
5517 10 111100 011 Rm option S 10 Rn Rt LDR St, [Xn|SP, R<m>{ext/sh}]
5518 11 111100 011 Rm option S 10 Rn Rt LDR Dt, [Xn|SP, R<m>{ext/sh}]
5519 00 111100 111 Rm option S 10 Rn Rt LDR Qt, [Xn|SP, R<m>{ext/sh}]
5521 00 111100 001 Rm option S 10 Rn Rt STR Bt, [Xn|SP, R<m>{ext/sh}]
5522 01 111100 001 Rm option S 10 Rn Rt STR Ht, [Xn|SP, R<m>{ext/sh}]
5523 10 111100 001 Rm option S 10 Rn Rt STR St, [Xn|SP, R<m>{ext/sh}]
5524 11 111100 001 Rm option S 10 Rn Rt STR Dt, [Xn|SP, R<m>{ext/sh}]
5525 00 111100 101 Rm option S 10 Rn Rt STR Qt, [Xn|SP, R<m>{ext/sh}]
5596 10 1110001 01 Rm opt S 10 Rn Rt LDRSW Xt, [Xn|SP, R<m>{ext/sh}]
5598 01 1110001 01 Rm opt S 10 Rn Rt LDRSH Xt, [Xn|SP, R<m>{ext/sh}]
5599 01 1110001 11 Rm opt S 10 Rn Rt LDRSH Wt, [Xn|SP, R<m>{ext/sh}]
5601 00 1110001 01 Rm opt S 10 Rn Rt LDRSB Xt, [Xn|SP, R<m>{ext/sh}]
5602 00 1110001 11 Rm opt S 10 Rn Rt LDRSB Wt, [Xn|SP, R<m>{ext/sh}]
5690 (at-Rn-then-Rn=EA)
5697 (at-EA-then-Rn=EA)
6671 11 1110001 01 Rm opt S 10 Rn Rt PRFM pfrop=Rt, [Xn|SP, R<m>{ext/sh}]
6687 11 1110001 00 imm9 00 Rn Rt PRFM pfrop=Rt, [Xn|SP, #simm]
6762 1101011 00 10 11111 000000 nn 00000 RET Rn
6763 1101011 00 01 11111 000000 nn 00000 CALL Rn
6764 1101011 00 00 11111 000000 nn 00000 JMP Rn
8939 0q0 01110000 imm5 0 0001 1 n d DUP Vd.T, Rn
8991 010 01110000 imm5 000111 n d INS Vd.Ts[ix], Rn
