Lines Matching defs:rD
888 ARM64Instr* ARM64Instr_LdSt64 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
892 i->ARM64in.LdSt64.rD = rD;
896 ARM64Instr* ARM64Instr_LdSt32 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
900 i->ARM64in.LdSt32.rD = rD;
904 ARM64Instr* ARM64Instr_LdSt16 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
908 i->ARM64in.LdSt16.rD = rD;
912 ARM64Instr* ARM64Instr_LdSt8 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
916 i->ARM64in.LdSt8.rD = rD;
1063 ARM64Instr* ARM64Instr_VCvtI2F ( ARM64CvtOp how, HReg rD, HReg rS ) {
1067 i->ARM64in.VCvtI2F.rD = rD;
1071 ARM64Instr* ARM64Instr_VCvtF2I ( ARM64CvtOp how, HReg rD, HReg rS,
1076 i->ARM64in.VCvtF2I.rD = rD;
1300 ARM64Instr* ARM64Instr_VDfromX ( HReg rD, HReg rX ) {
1303 i->ARM64in.VDfromX.rD = rD;
1433 ppHRegARM64(i->ARM64in.LdSt64.rD);
1440 ppHRegARM64(i->ARM64in.LdSt64.rD);
1446 ppHRegARM64(i->ARM64in.LdSt32.rD);
1453 ppHRegARM64(i->ARM64in.LdSt32.rD);
1459 ppHRegARM64(i->ARM64in.LdSt16.rD);
1466 ppHRegARM64(i->ARM64in.LdSt16.rD);
1472 ppHRegARM64(i->ARM64in.LdSt8.rD);
1479 ppHRegARM64(i->ARM64in.LdSt8.rD);
1650 ppHRegARM64(i->ARM64in.VCvtI2F.rD);
1665 ppHRegARM64(i->ARM64in.VCvtF2I.rD);
1854 ppHRegARM64(i->ARM64in.VDfromX.rD);
1965 addHRegUse(u, HRmWrite, i->ARM64in.LdSt64.rD);
1967 addHRegUse(u, HRmRead, i->ARM64in.LdSt64.rD);
1973 addHRegUse(u, HRmWrite, i->ARM64in.LdSt32.rD);
1975 addHRegUse(u, HRmRead, i->ARM64in.LdSt32.rD);
1981 addHRegUse(u, HRmWrite, i->ARM64in.LdSt16.rD);
1983 addHRegUse(u, HRmRead, i->ARM64in.LdSt16.rD);
1989 addHRegUse(u, HRmWrite, i->ARM64in.LdSt8.rD);
1991 addHRegUse(u, HRmRead, i->ARM64in.LdSt8.rD);
2123 addHRegUse(u, HRmWrite, i->ARM64in.VCvtI2F.rD);
2127 addHRegUse(u, HRmWrite, i->ARM64in.VCvtF2I.rD);
2215 addHRegUse(u, HRmWrite, i->ARM64in.VDfromX.rD);
2299 i->ARM64in.LdSt64.rD = lookupHRegRemap(m, i->ARM64in.LdSt64.rD);
2303 i->ARM64in.LdSt32.rD = lookupHRegRemap(m, i->ARM64in.LdSt32.rD);
2307 i->ARM64in.LdSt16.rD = lookupHRegRemap(m, i->ARM64in.LdSt16.rD);
2311 i->ARM64in.LdSt8.rD = lookupHRegRemap(m, i->ARM64in.LdSt8.rD);
2372 i->ARM64in.VCvtI2F.rD = lookupHRegRemap(m, i->ARM64in.VCvtI2F.rD);
2376 i->ARM64in.VCvtF2I.rD = lookupHRegRemap(m, i->ARM64in.VCvtF2I.rD);
2459 i->ARM64in.VDfromX.rD
2460 = lookupHRegRemap(m, i->ARM64in.VDfromX.rD);
3080 rD, using the given amode for the address. */
3129 rD, using the given amode for the address. */
3178 rD, using the given amode for the address. */
3298 UInt rD = iregEnc(i->ARM64in.Arith.dst);
3307 argR->ARM64riA.I12.imm12, rN, rD
3314 X01011000, rM, X000000, rN, rD
3324 UInt rD = 31; /* XZR, we are going to dump the result */
3330 /* 1 11 10001 sh imm12 Rn Rd = SUBS Xd, Xn, #imm */
3331 /* 0 11 10001 sh imm12 Rn Rd = SUBS Wd, Wn, #imm */
3335 argR->ARM64riA.I12.imm12, rN, rD);
3338 /* 1 11 01011 00 0 Rm 000000 Rn Rd = SUBS Xd, Xn, Xm */
3339 /* 0 11 01011 00 0 Rm 000000 Rn Rd = SUBS Wd, Wn, Wm */
3342 X01011000, rM, X000000, rN, rD);
3351 UInt rD = iregEnc(i->ARM64in.Logic.dst);
3355 vassert(rD < 31);
3366 /* 1 01 100100 N immR immS Rn Rd = ORR <Xd|Sp>, Xn, #imm */
3367 /* 1 00 100100 N immR immS Rn Rd = AND <Xd|Sp>, Xn, #imm */
3368 /* 1 10 100100 N immR immS Rn Rd = EOR <Xd|Sp>, Xn, #imm */
3372 rN, rD
3382 *p++ = X_3_8_5_6_5_5(opc, X01010000, rM, X000000, rN, rD);
3391 UInt rD = 31; /* XZR, we are going to dump the result */
3396 /* 1 11 100100 N immR immS Rn Rd = ANDS Xd, Xn, #imm */
3400 rN, rD
3410 UInt rD = iregEnc(i->ARM64in.Shift.dst);
3413 vassert(rD < 31);
3425 1, 64-sh, 63-sh, rN, rD);
3428 *p++ = X_3_6_1_6_6_5_5(X110, X100110, 1, sh, 63, rN, rD);
3431 *p++ = X_3_6_1_6_6_5_5(X100, X100110, 1, sh, 63, rN, rD);
3451 *p++ = X_3_8_5_6_5_5(X100, X11010110, rM, subOpc, rN, rD);
3503 iregEnc(i->ARM64in.LdSt64.rD),
3509 iregEnc(i->ARM64in.LdSt32.rD),
3515 iregEnc(i->ARM64in.LdSt16.rD),
3521 iregEnc(i->ARM64in.LdSt8.rD),
3970 UInt rD = dregEnc(i->ARM64in.VCvtI2F.rD);
3975 *p++ = X_3_5_8_6_5_5(X000, X11110, X00100010, X000000, rN, rD);
3978 *p++ = X_3_5_8_6_5_5(X000, X11110, X01100010, X000000, rN, rD);
3981 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100010, X000000, rN, rD);
3984 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100010, X000000, rN, rD);
3987 *p++ = X_3_5_8_6_5_5(X000, X11110, X00100011, X000000, rN, rD);
3990 *p++ = X_3_5_8_6_5_5(X000, X11110, X01100011, X000000, rN, rD);
3993 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100011, X000000, rN, rD);
3996 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100011, X000000, rN, rD);
4005 sf 00,11110,0x 1 00 000,000000 n d FCVTNS Rd, Fn (round to
4006 sf 00,11110,0x 1 00 001,000000 n d FCVTNU Rd, Fn nearest)
4011 Rd is Xd when sf==1, Wd when sf==0
4015 UInt rD = iregEnc(i->ARM64in.VCvtF2I.rD);
4023 X000000, rN, rD);
4027 X000000, rN, rD);
4031 X000000, rN, rD);
4035 X000000, rN, rD);
4039 X000000, rN, rD);
4043 X000000, rN, rD);
4047 X000000, rN, rD);
4051 X000000, rN, rD);
5334 UInt dd = dregEnc(i->ARM64in.VDfromX.rD);
5401 HReg rD = i->ARM64in.VMov.dst;
5405 UInt dd = qregEnc(rD);
5411 UInt dd = dregEnc(rD);
