Lines Matching defs:sD
775 case ARM64vecshi_SQSHRN2SD: *nm = "sqshrn"; *ar = "2sd"; return;
778 case ARM64vecshi_UQSHRN2SD: *nm = "uqshrn"; *ar = "2sd"; return;
781 case ARM64vecshi_SQSHRUN2SD: *nm = "sqshrun"; *ar = "2sd"; return;
784 case ARM64vecshi_SQRSHRN2SD: *nm = "sqrshrn"; *ar = "2sd"; return;
787 case ARM64vecshi_UQRSHRN2SD: *nm = "uqrshrn"; *ar = "2sd"; return;
790 case ARM64vecshi_SQRSHRUN2SD: *nm = "sqrshrun"; *ar = "2sd"; return;
1025 ARM64Instr* ARM64Instr_VLdStH ( Bool isLoad, HReg sD, HReg rN, UInt uimm12 ) {
1029 i->ARM64in.VLdStH.hD = sD;
1035 ARM64Instr* ARM64Instr_VLdStS ( Bool isLoad, HReg sD, HReg rN, UInt uimm12 ) {
1039 i->ARM64in.VLdStS.sD = sD;
1607 ppHRegARM64asSreg(i->ARM64in.VLdStS.sD);
1616 ppHRegARM64asSreg(i->ARM64in.VLdStS.sD);
2101 sD);
2103 addHRegUse(u, HRmRead, i->ARM64in.VLdStS.sD);
2359 i->ARM64in.VLdStS.sD = lookupHRegRemap(m, i->ARM64in.VLdStS.sD);
3913 UInt sD = dregEnc(i->ARM64in.VLdStS.sD);
3920 vassert(sD < 32);
3923 uimm12, rN, sD);
3960 000 11110 00 1 00 010 000000 n d SCVTF Sd, Wn
3962 100 11110 00 1 00 010 000000 n d SCVTF Sd, Xn
3964 000 11110 00 1 00 011 000000 n d UCVTF Sd, Wn
3966 100 11110 00 1 00 011 000000 n d UCVTF Sd, Xn
3974 case ARM64cvt_F32_I32S: /* SCVTF Sd, Wn */
3980 case ARM64cvt_F32_I64S: /* SCVTF Sd, Xn */
3986 case ARM64cvt_F32_I32U: /* UCVTF Sd, Wn */
3992 case ARM64cvt_F32_I64U: /* UCVTF Sd, Xn */
4061 ---------- 01 ----- 0,0 --------- FCVT Sd, Dn (D->S)
4075 000,11110, 11 10001 0,0 10000 n d FCVT Sd, Hn (H->S)
4143 000,11110 00 1,0000 0,0 10000 n d FMOV Sd, Sn (not handled)
4148 UInt sD = dregEnc(i->ARM64in.VUnaryS.dst);
4160 (b15 << 5) | X10000, sN, sD);
4164 000, 11110 00 1,001 11,1 10000 n d FRINTI Sd, Sm (round per FPCR)
4167 *p++ = X_3_8_5_6_5_5(X000, X11110001, X00111, X110000, sN, sD);
4171 010, 11110 10 1,0000 1,1111 10 n d FRECPX Sd, Sm
4174 *p++ = X_3_8_5_6_5_5(X010, X11110101, X00001, X111110, sN, sD);
4209 UInt sD = dregEnc(i->ARM64in.VBinS.dst);
4222 = X_3_8_5_6_5_5(X000, X11110001, sM, (b1512 << 2) | X10, sN, sD);
4241 000 11110 00 1 m cond 11 n d FCSEL Sd,Sn,Sm,cond
5397 /* 000 11110 00 10000 00 10000 n d FMOV Sd, Sn
