Lines Matching refs:VBinS
1136 i->ARM64in.VBinS.op = op;
1137 i->ARM64in.VBinS.dst = dst;
1138 i->ARM64in.VBinS.argL = argL;
1139 i->ARM64in.VBinS.argR = argR;
1728 vex_printf("f%s ", showARM64FpBinOp(i->ARM64in.VBinS.op));
1729 ppHRegARM64asSreg(i->ARM64in.VBinS.dst);
1731 ppHRegARM64asSreg(i->ARM64in.VBinS.argL);
1733 ppHRegARM64asSreg(i->ARM64in.VBinS.argR);
2155 addHRegUse(u, HRmWrite, i->ARM64in.VBinS.dst);
2156 addHRegUse(u, HRmRead, i->ARM64in.VBinS.argL);
2157 addHRegUse(u, HRmRead, i->ARM64in.VBinS.argR);
2404 i->ARM64in.VBinS.dst = lookupHRegRemap(m, i->ARM64in.VBinS.dst);
2405 i->ARM64in.VBinS.argL = lookupHRegRemap(m, i->ARM64in.VBinS.argL);
2406 i->ARM64in.VBinS.argR = lookupHRegRemap(m, i->ARM64in.VBinS.argR);
4209 UInt sD = dregEnc(i->ARM64in.VBinS.dst);
4210 UInt sN = dregEnc(i->ARM64in.VBinS.argL);
4211 UInt sM = dregEnc(i->ARM64in.VBinS.argR);
4213 switch (i->ARM64in.VBinS.op) {