Lines Matching refs:n2
312 void log_2Ir(InstrInfo* n, InstrInfo* n2)
315 n2->parent->Ir.a++;
320 void log_3Ir(InstrInfo* n, InstrInfo* n2, InstrInfo* n3)
323 n2->parent->Ir.a++;
350 void log_2IrNoX_0D_cache_access(InstrInfo* n, InstrInfo* n2)
355 // n2, n2->instr_addr, n2->instr_len);
359 cachesim_I1_doref_NoX(n2->instr_addr, n2->instr_len,
360 &n2->parent->Ir.m1, &n2->parent->Ir.mL);
361 n2->parent->Ir.a++;
365 void log_3IrNoX_0D_cache_access(InstrInfo* n, InstrInfo* n2, InstrInfo* n3)
371 // n2, n2->instr_addr, n2->instr_len,
376 cachesim_I1_doref_NoX(n2->instr_addr, n2->instr_len,
377 &n2->parent->Ir.m1, &n2->parent->Ir.mL);
378 n2->parent->Ir.a++;
