Lines Matching refs:imm32
49 adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
50 adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
51 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
52 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
75 addl imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
76 addl imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
77 addl imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
95 andl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x02005430]
96 andl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x02005430]
97 andl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x02005430]
344 cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
345 cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
346 cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
347 cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
348 cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
349 cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
350 cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
351 cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
352 cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
353 cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
354 cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
355 cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
356 cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
357 cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
358 cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
359 cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
360 cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
361 cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
362 cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
363 cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
364 cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
365 cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
366 cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
367 cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
368 cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
369 cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
370 cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
371 cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
372 cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
373 cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
458 imull imm32[12345] r32.ud[67890] => 1.ud[838102050]
459 imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050]
460 imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050]
481 movl imm32[12345678] r32.ud[0] => 1.ud[12345678]
482 movl imm32[12345678] m32.ud[0] => 1.ud[12345678]
530 orl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x96767779]
531 orl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x96767779]
532 orl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
674 sbbl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
675 sbbl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
676 sbbl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
677 sbbl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
678 sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
679 sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
964 subl imm32[12345678] r32.ud[87654321] => 1.ud[75308643]
965 subl imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
966 subl imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
1020 testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1021 testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1022 testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1023 testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1024 testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1025 testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1026 testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1027 testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1028 testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1029 testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1030 testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1031 testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1032 testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1033 testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1034 testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1078 xorl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x94762349]
1079 xorl imm32[0x86427531] ebx.ud[0x12345678] => 1.ud[0x94762349]
1080 xorl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x94762349]
