Lines Matching refs:immediate
406 // The worst case for size is mov 64-bit immediate to sp:
418 // 4. 32-bit orr immediate.
419 // 5. 64-bit orr immediate.
426 // Try to move the immediate in one instruction, and if that fails, switch to
434 // Generic immediate case. Imm will be represented by
503 // Immediate can be represented in a move zero instruction. Movz can't write
510 // Immediate can be represented in a move negative instruction. Movn can't
517 // Immediate can be represented in a logical orr instruction.
764 // The worst case for size is logical immediate to sp:
772 int64_t immediate = operand.GetImmediate();
775 // If the operation is NOT, invert the operation and immediate.
778 immediate = ~immediate;
781 // Ignore the top 32 bits of an immediate if we're moving to a W register.
784 VIXL_ASSERT(((immediate >> kWRegSize) == 0) ||
785 ((immediate >> kWRegSize) == -1));
786 immediate &= kWRegMask;
789 VIXL_ASSERT(rd.Is64Bits() || IsUint32(immediate));
792 if (immediate == 0) {
809 } else if ((rd.Is64Bits() && (immediate == -1)) ||
810 (rd.Is32Bits() && (immediate == 0xffffffff))) {
816 Mov(rd, immediate);
831 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
832 // Immediate can be encoded in the instruction.
835 // Immediate can't be encoded: synthesize using move immediate.
837 Operand imm_operand = MoveImmediateForShiftedOp(temp, immediate);
876 // The worst case for size is mov immediate with up to 4 instructions.
965 // Immediate is of the form 0x00MMFFFF.
971 // Immediate is of the form 0x0000MMFF.
977 // Immediate is of the form 0xFFMM0000.
982 // Immediate is of the form 0xFFFFMM00.
1050 // 8-bit immediate.
1054 // 16-bit immediate.
1057 // 32-bit immediate.
1060 // 64-bit immediate.
1079 // The worst case for size is mvn immediate with up to 4 instructions.
1143 // The worst case for size is ccmp immediate:
1151 // The immediate can be encoded in the instruction, or the operand is an
1528 // Encode the immediate in a single move instruction, if possible.
1532 // Pre-shift the immediate to the least-significant bits of the register.
1536 // Pre-shift the immediate to the most-significant bits of the register,
1542 // The new immediate has been moved into the destination's low bits:
1546 // The new immediate has been moved into the destination's high bits:
1631 // Worst case is add/sub immediate:
1713 // Worst case is addc/subc immediate:
1721 // Add/sub with carry (immediate or ROR shifted register.)
1783 // Check if an immediate offset fits in the immediate field of the
1788 // Immediate offset that can't be encoded using unsigned or unscaled
1825 // Worst case is ldp/stp immediate:
1834 // Check if the offset fits in the immediate field of the appropriate
1867 // Check if an immediate offset fits in the immediate field of the
1872 // Immediate offset that can't be encoded using unsigned or unscaled
2327 // the assembler directly here. However, this means that large immediate
