Lines Matching defs:temp4
32 // TEMP4..TEMP5 - temporary registers
33 #define VERTICAL_PASS(A, B, C, D, TEMP4, TEMP0, TEMP1, TEMP2, TEMP3) \
38 "addu %[" #TEMP4 "], %[temp16], %[temp18] \n\t" \
50 "addu %[" #TEMP0 "], %[" #TEMP4 "], %[" #TEMP3 "] \n\t" \
53 "subu %[" #TEMP3 "], %[" #TEMP4 "], %[" #TEMP3 "] \n\t"
60 // TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements
61 #define HORIZONTAL_PASS(A, TEMP0, TEMP4, TEMP8, TEMP12) \
65 "mul %[" #TEMP0 "], %[" #TEMP4 "], %[kC2] \n\t" \
67 "mul %[" #TEMP4 "], %[" #TEMP4 "], %[kC1] \n\t" \
71 "sra %[" #TEMP4 "], %[" #TEMP4 "], 16 \n\t" \
74 "addu %[temp19], %[" #TEMP4 "], %[" #TEMP12 "] \n\t" \
76 "addu %[" #TEMP4 "], %[temp17], %[temp18] \n\t" \
81 "sra %[" #TEMP4 "], %[" #TEMP4 "], 3 \n\t" \
89 "addu %[" #TEMP4 "], %[temp17], %[" #TEMP4 "] \n\t" \
93 "slt %[temp17], %[" #TEMP4 "], $zero \n\t" \
97 "movn %[" #TEMP4 "], $zero, %[temp17] \n\t" \
102 "slt %[temp17], %[" #TEMP4 "], %[temp20] \n\t" \
106 "movz %[" #TEMP4 "], %[temp20], %[temp17] \n\t" \
111 "sb %[" #TEMP4 "], 1+" XSTR(BPS) "*" #A "(%[temp16]) \n\t" \
118 int temp0, temp1, temp2, temp3, temp4, temp5, temp6;
125 VERTICAL_PASS(0, 16, 8, 24, temp4, temp0, temp1, temp2, temp3)
126 VERTICAL_PASS(2, 18, 10, 26, temp8, temp4, temp5, temp6, temp7)
130 HORIZONTAL_PASS(0, temp0, temp4, temp8, temp12)
136 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
171 "slt %[temp4], %[temp2], %[coeff] \n\t" \
174 "beqz %[temp4], 2f \n\t" \
181 "slt %[temp4], %[max_level], %[level] \n\t" \
182 "movn %[level], %[max_level], %[temp4] \n\t" \
192 int temp0, temp1, temp2, temp3, temp4, temp5;
224 [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
261 "lbu %[temp4], 0+" XSTR(BPS) "*" #A "(%[b]) \n\t" \
269 "addu %[temp3], %[temp4], %[temp6] \n\t" \
270 "subu %[temp4], %[temp4], %[temp6] \n\t" \
279 "addu %[temp6], %[temp4], %[temp5] \n\t" \
280 "subu %[temp4], %[temp4], %[temp5] \n\t" \
288 "sw %[temp4], " #G1 "(%[tmp]) \n\t"
315 "sra %[temp4], %[temp3], 31 \n\t" \
319 "xor %[temp3], %[temp3], %[temp4] \n\t" \
323 "subu %[temp3], %[temp3], %[temp4] \n\t" \
327 "lhu %[temp4], " #E "(%[w]) \n\t" \
331 "madd %[temp4], %[temp3] \n\t" \
350 "msub %[temp4], %[temp3] \n\t" \
353 "sra %[temp4], %[temp1], 31 \n\t" \
356 "xor %[temp1], %[temp1], %[temp4] \n\t" \
359 "subu %[temp1], %[temp1], %[temp4] \n\t" \
367 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;
387 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
452 // TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements
453 #define VERTICAL_PASS(A, B, C, D, TEMP0, TEMP4, TEMP8, TEMP12) \
456 "addu %[temp17], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \
457 "subu %[temp18], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \
460 "mul %[" #TEMP4 "], %[temp19], %[c5352] \n\t" \
465 "addu %[" #TEMP12 "], %[" #TEMP12 "], %[" #TEMP4 "] \n\t" \
466 "subu %[" #TEMP4 "], %[temp16], %[temp17] \n\t" \
467 "sra %[" #TEMP4 "], %[" #TEMP4 "], 4 \n\t" \
477 "sh %[" #TEMP4 "], " #C "(%[temp20]) \n\t" \
482 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;
492 HORIZONTAL_PASS(1, temp4, temp5, temp6, temp7)
496 VERTICAL_PASS(0, 8, 16, 24, temp0, temp4, temp8, temp12)
502 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
523 "lbu %[temp4], " #C "(%[a]) \n\t" \
529 "subu %[temp4], %[temp4], %[temp5] \n\t" \
533 "madd %[temp4], %[temp4] \n\t" \
544 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
568 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
578 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
594 [temp3]"=&r"(temp3), [temp4temp4), [temp5]"=&r"(temp5),
604 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
616 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
626 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
635 [temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),
