Lines Matching refs:cpu_data
30 #define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
34 #define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
37 #define cpu_has_3k_cache (cpu_data[0].options & MIPS_CPU_3K_CACHE)
44 #define cpu_has_4k_cache (cpu_data[0].options & MIPS_CPU_4K_CACHE)
47 #define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE)
59 #define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
62 #define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
66 #define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
70 #define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
74 #define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
77 #define cpu_has_cache_cdex_p (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_P)
81 #define cpu_has_cache_cdex_s (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_S)
85 #define cpu_has_prefetch (cpu_data[0].options & MIPS_CPU_PREFETCH)
89 #define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
92 #define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
96 #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
100 #define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
104 #define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
107 #define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D)
111 #define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
115 #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
119 #define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
122 #define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC)
126 #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
134 #define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
137 #define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
141 #define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
145 #define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
154 #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
157 #define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
161 #define cpu_has_userlocal (cpu_data[0].options & MIPS_CPU_ULRI)
165 #define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
169 #define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
172 #define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
191 #define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES)
195 #define cpu_dcache_line_size() cpu_data[0].dcache.linesz
199 #define cpu_icache_line_size() cpu_data[0].icache.linesz
202 #define cpu_scache_line_size() cpu_data[0].scache.linesz
