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Lines Matching refs:reg1

894   unsigned reg1;
939 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
943 reg1 = 0;
961 if (check_spl_reg (& reg1))
971 inst |= (reg1 << RD_LOW) & RD_MASK;
977 inst |= (reg1 << RD_LOW) & RD_MASK;
986 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
990 reg1 = 0;
1005 if (check_spl_reg (& reg1))
1053 count = 32 - reg1;
1064 inst |= (reg1 << RD_LOW) & RD_MASK;
1076 reg1++;
1078 inst |= (reg1 << RD_LOW) & RD_MASK;
1104 inst |= (reg1 << RD_LOW) & RD_MASK;
1112 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1116 reg1 = 0;
1131 if (check_spl_reg (&reg1))
1149 inst |= (reg1 << RD_LOW) & RD_MASK;
1156 op_end = parse_reg (op_end + 1, &reg1); /* Get r1. */
1160 reg1 = 0;
1171 if (check_spl_reg (& reg1))
1176 inst |= (reg1 << RA_LOW) & RA_MASK;
1183 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1187 reg1 = 0;
1198 if (check_spl_reg (&reg1))
1203 inst |= (reg1 << RD_LOW) & RD_MASK;
1210 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1214 reg1 = 0;
1225 if (check_spl_reg (&reg1))
1228 inst |= (reg1 << RD_LOW) & RD_MASK;
1235 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1239 reg1 = 0;
1248 if (check_spl_reg (&reg1))
1258 inst |= (reg1 << RD_LOW) & RD_MASK;
1264 op_end = parse_reg (op_end + 1, &reg1); /* Get r1. */
1268 reg1 = 0;
1279 if (check_spl_reg (&reg1))
1282 inst |= (reg1 << RA_LOW) & RA_MASK;
1301 op_end = parse_reg (op_end + 1, &reg1); /* Get r1. */
1305 reg1 = 0;
1309 if (check_spl_reg (&reg1))
1312 inst |= (reg1 << RA_LOW) & RA_MASK;
1319 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1323 reg1 = 0;
1327 if (check_spl_reg (&reg1))
1330 inst |= (reg1 << RD_LOW) & RD_MASK;
1336 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1340 reg1 = 0;
1382 inst |= (reg1 << RD_LOW) & RD_MASK;
1389 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1393 reg1 = 0;
1403 if (reg1 == REG_MSR)
1405 else if (reg1 == REG_PC)
1407 else if (reg1 == REG_EAR)
1409 else if (reg1 == REG_ESR)
1411 else if (reg1 == REG_FSR)
1413 else if (reg1 == REG_BTR)
1415 else if (reg1 == REG_EDR)
1417 else if (reg1 == REG_PID)
1419 else if (reg1 == REG_ZPR)
1421 else if (reg1 == REG_TLBX)
1423 else if (reg1 == REG_TLBLO)
1425 else if (reg1 == REG_TLBHI)
1427 else if (reg1 == REG_TLBSX)
1429 else if (reg1 == REG_SHR)
1431 else if (reg1 == REG_SLR)
1442 op_end = parse_reg (op_end + 1, &reg1); /* Get r1. */
1446 reg1 = 0;
1457 if (check_spl_reg (&reg1))
1463 inst |= (reg1 << RA_LOW) & RA_MASK;
1471 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1475 reg1 = 0;
1486 if (check_spl_reg (&reg1))
1491 inst |= (reg1 << RD_LOW) & RD_MASK;
1498 op_end = parse_reg (op_end + 1, &reg1); /* Get r1. */
1502 reg1 = 0;
1510 if (check_spl_reg (&reg1))
1558 inst |= (reg1 << RA_LOW) & RA_MASK;
1564 op_end = parse_reg (op_end + 1, &reg1); /* Get rd. */
1568 reg1 = 0;
1576 if (check_spl_reg (&reg1))
1624 inst |= (reg1 << RD_LOW) & RD_MASK;