Lines Matching refs:modrm
3094 modrm;
12375 dp = ®_table[dp->op[1].bytemode][modrm.reg];
12379 vindex = modrm.mod == 0x3 ? 1 : 0;
12384 dp = &rm_table[dp->op[1].bytemode][modrm.rm];
12468 modrm.mod = (*codep >> 6) & 3;
12469 modrm.reg = (*codep >> 3) & 7;
12470 modrm.rm = *codep & 7;
12552 modrm.mod = (*codep >> 6) & 3;
12553 modrm.reg = (*codep >> 3) & 7;
12554 modrm.rm = *codep & 7;
12613 /* There is no MODRM byte for VEX [82|77]. */
12617 modrm.mod = (*codep >> 6) & 3;
12618 modrm.reg = (*codep >> 3) & 7;
12619 modrm.rm = *codep & 7;
12662 /* There is no MODRM byte for VEX [82|77]. */
12666 modrm.mod = (*codep >> 6) & 3;
12667 modrm.reg = (*codep >> 3) & 7;
12668 modrm.rm = *codep & 7;
12758 modrm.mod = (*codep >> 6) & 3;
12759 modrm.reg = (*codep >> 3) & 7;
12760 modrm.rm = *codep & 7;
12763 if (modrm.mod == 3 && vex.b)
12801 /* If modrm.mod == 3, operand must be register. */
12804 && modrm.mod != 3
12805 && modrm.rm == 4)
13058 modrm.mod = (*codep >> 6) & 3;
13059 modrm.reg = (*codep >> 3) & 7;
13060 modrm.rm = *codep & 7;
13545 if (modrm.mod != 3)
13547 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
13559 dp = &float_reg[floatop - 0xd8][modrm.reg];
13562 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
13601 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
13658 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
13707 if (modrm.mod == 3)
13902 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
13915 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
13937 || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
14084 || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
14656 int reg = modrm.rm;
14881 base = modrm.rm;
14940 switch (modrm.mod)
14975 if (modrm.mod != 0 || base == 5)
15034 && (disp || modrm.mod != 0 || base == 5))
15041 else if (modrm.mod != 1 && disp != -disp)
15060 if (modrm.mod != 0 || base == 5)
15076 switch (modrm.mod)
15079 if (modrm.rm == 6)
15100 if (modrm.mod != 0 || modrm.rm == 6)
15106 if (modrm.mod != 0 || modrm.rm != 6)
15110 oappend (index16[modrm.rm]);
15112 && (disp || modrm.mod != 0 || modrm.rm == 6))
15119 else if (modrm.mod != 1)
15195 if (modrm.mod == 3)
15213 oappend (names8rex[modrm.reg + add]);
15215 oappend (names8[modrm.reg + add]);
15218 oappend (names16[modrm.reg + add]);
15223 oappend (names32[modrm.reg + add]);
15226 oappend (names64[modrm.reg + add]);
15229 oappend (names_bnd[modrm.reg]);
15239 oappend (names64[modrm.reg + add]);
15243 oappend (names32[modrm.reg + add]);
15245 oappend (names16[modrm.reg + add]);
15251 oappend (names64[modrm.reg + add]);
15253 oappend (names32[modrm.reg + add]);
15257 oappend (names_mask[modrm.reg + add]);
15686 oappend (names_seg[modrm.reg]);
15688 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
15861 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
15875 sprintf (scratchbuf, "db%d", modrm.reg + add);
15877 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
15884 sprintf (scratchbuf, "%%tr%d", modrm.reg);
15900 int reg = modrm.reg;
15919 int reg = modrm.reg;
15987 if (modrm.mod != 3)
16006 reg = modrm.rm;
16027 if (modrm.mod != 3)
16042 oappend (names_mm[modrm.rm]);
16049 oappend (names_mm[modrm.reg]);
16062 if (modrm.mod != 3)
16068 reg = modrm.rm;
16147 if (modrm.mod == 3)
16156 if (modrm.mod == 3)
16165 if (modrm.mod == 3)
16166 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
16175 if (modrm.mod != 3 || modrm.rm != 0)
16288 /* Since a variable sized modrm/sib chunk is between the start
16290 all the modrm processing first, and don't know until now that
16440 if (modrm.mod != 3
16459 if (modrm.mod != 3)
16476 if (modrm.mod != 3
16568 if (modrm.mod == 3)
16582 oappend (names8rex[modrm.rm + add]);
16584 oappend (names8[modrm.rm + add]);
16590 oappend (names64[modrm.rm + add]);
16592 oappend (names16[modrm.rm + add]);
16594 oappend (names32[modrm.rm + add]);
16708 if (modrm.mod != 3)
16714 int base = modrm.rm;
16734 switch (modrm.mod)
16737 /* When modrm.rm == 5 or modrm.rm == 4 and base in
16761 switch (modrm.mod)
16764 /* When modrm.rm == 6, there is a 2 byte displacement. */
16765 if (modrm.rm != 6)
16795 if (reg == -1 && modrm.mod != 3)
16804 reg = modrm.rm;
16871 if (modrm.mod == 3)
16873 int reg = modrm.rm;
16894 if (modrm.mod == 3)
16996 if (modrm.mod != 3)
17008 if (modrm.mod != 3)
17244 reg = modrm.rm;
17279 oappend (names_mask [modrm.reg]);
17289 if (modrm.mod == 3 && vex.b)
