Lines Matching refs:POWER4
385 /* Power4 version for mfcr. */
1037 (ie. not Power4 compatible), we set the y bit of the BO field to 1
1041 Power4 compatible targets use two bits, "a", and "t", instead of
1294 of the instruction, which is faster. Unlike the Power4 branch hint
1321 /* Is this a Power4 insn? */
1329 /* Check that non-power4 form of mfcr has a zero MASK. */
2196 bit. Similarly for the 'at' bits used for power4 branch hints. */
2711 #define POWER4 PPC_OPCODE_POWER4
2786 {"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476, {0}},
4398 {"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
4399 {"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
4717 {"dcbtst", X(31,246), X_MASK, POWER4, PPCNONE, {RA0, RB, CT}},
4718 {"dcbtst", X(31,246), X_MASK, PPC|PPCVLE, POWER4, {CT, RA0, RB}},
4749 {"tlbiel", X(31,274), XRTLRA_MASK, POWER4, PPC476, {RB, L}},
4759 {"dcbt", X(31,278), X_MASK, POWER4, PPCNONE, {RA0, RB, CT}},
4760 {"dcbt", X(31,278), X_MASK, PPC|PPCVLE, POWER4, {CT, RA0, RB}},
5836 {"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA0, RB}},
5905 {"lq", OP(56), OP_MASK, POWER4, PPC476, {RTQ, DQ, RAQ}},
6201 {"stq", DSO(62,2), DS_MASK, POWER4, PPC476, {RSQ, DS, RA0}},
