Lines Matching defs:oper
150 RL78_Opcode_Operand * oper;
220 oper = *s == '0' ? &opcode.op[0] : &opcode.op[1];
223 if (oper->use_es && indirect_type (oper->type))
232 PR (PS, "%s", condition_names[oper->condition]);
236 switch (oper->type)
240 dis->print_address_func (oper->addend, dis);
242 || oper->addend > 999
243 || oper->addend < -999)
244 PR (PS, "%#x", oper->addend);
246 PR (PS, "%d", oper->addend);
250 PR (PS, "%s", register_names[oper->reg]);
254 PR (PS, "%s.%d", register_names[oper->reg], oper->bit_number);
259 switch (oper->reg)
262 if (oper->addend == 0xffffa && do_sfr && opcode.size == RL78_Byte)
264 else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word)
266 else if (oper->addend >= 0xffe20)
267 PR (PS, "%#x", oper->addend);
270 int faddr = oper->addend;
271 if (do_es && ! oper->use_es)
280 PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);
284 PR (PS, "[%s", register_names[oper->reg]);
285 if (oper->reg2 != RL78_Reg_None)
286 PR (PS, "+%s", register_names[oper->reg2]);
287 if (oper->addend)
288 PR (PS, "+%d", oper->addend);
293 if (oper->type == RL78_Operand_BitIndirect)
294 PR (PS, ".%d", oper->bit_number);
302 PR (PS, "[%s++]", register_names[oper->reg]);
305 PR (PS, "[--%s]", register_names[oper->reg]);
