Lines Matching refs:BWL
47 static int bwl[] =
86 /* This is for the BWL and BW bitfields. */
101 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
110 #define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
118 #define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
127 #define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
132 #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
277 BWL(LSIZE);
293 BWL (sz);
374 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
377 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
789 ID(suntil); BWL(sz); F___ZC;
792 ID(swhile); BWL(sz); F___ZC;
798 ID(sstr); BWL(sz);
804 ID(rmpa); BWL(sz); F_OS__;
897 ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
900 ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
902 BWL(LSIZE);
905 ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
909 ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
912 ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
914 BWL(LSIZE);
917 ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
921 ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F___ZC;
924 ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
926 BWL(LSIZE);
929 ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F___ZC;
933 ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
936 ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
938 BWL(LSIZE);
941 ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
945 ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
948 ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
1002 ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
