| /external/swiftshader/third_party/subzero/pydir/ |
| gen_arm32_reg_tables.py | 6 self.Aliases = list(Alias.strip() for Alias in AliasesStr.split(','))
9 return 'REGLIST{AliasCount}(RegARM32, {Aliases})'.format(
10 AliasCount=len(self.Aliases), Aliases=', '.join(self.Aliases))
20 IsFP32=0, IsFP64=0, IsVec128=0, Aliases=None):
33 # The argument Aliases is a string with the register aliasing information.
35 Aliases = RegAliases(Aliases)
44 def Aliases(self)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| TypeBasedAliasAnalysis.cpp | 55 // aliases, so struct assignments must use conservative TBAA nodes. There's
139 bool Aliases(const MDNode *A, const MDNode *B) const;
169 /// Aliases - Test whether the type represented by A may alias the
172 TypeBasedAliasAnalysis::Aliases(const MDNode *A,
226 if (Aliases(AM, BM))
280 if (!Aliases(L, M))
296 if (!Aliases(M1, M2))
|
| /external/llvm/lib/Analysis/ |
| TypeBasedAliasAnalysis.cpp | 119 // aliases, so struct assignments must use conservative TBAA nodes. There's
296 if (Aliases(AM, BM))
351 if (!Aliases(L, M))
366 if (!Aliases(M1, M2))
478 /// Aliases - Test whether the type represented by A may alias the
480 bool TypeBasedAAResult::Aliases(const MDNode *A, const MDNode *B) const {
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| InterferenceCache.h | 36 /// Entry - A cache entry containing interference information for all aliases
60 SmallVector<std::pair<LiveIntervalUnion*, unsigned>, 8> Aliases;
94 /// reset - Initialize entry to represent physReg's aliases.
|
| /external/swiftshader/third_party/subzero/src/ |
| IceRegistersARM32.h | 101 uint16_t Aliases[1 << NUM_ALIASES_BITS];
|
| IceRegAlloc.cpp | 423 const auto &Aliases = *RegAliases[Var->getRegNumTmp()];
424 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
468 const auto &Aliases = *RegAliases[Item->getRegNumTmp()];
469 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
492 const auto &Aliases = *RegAliases[Item->getRegNumTmp()];
493 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
534 const auto &Aliases = *RegAliases[SrcVar->getRegNumTmp()];
535 const int SrcReg = (Iter.RegMask & Aliases).find_first();
571 const auto &Aliases = *RegAliases[Item->getRegNumTmp()];
572 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
[all...] |
| IceTargetLoweringX8632Traits.h | 283 isTrunc8Rcvr, isAhRcvr, aliases) \
296 isTrunc8Rcvr, isAhRcvr, aliases) \
310 isTrunc8Rcvr, isAhRcvr, aliases) \
324 isTrunc8Rcvr, isAhRcvr, aliases) \
338 isTrunc8Rcvr, isAhRcvr, aliases) \
351 isTrunc8Rcvr, isAhRcvr, aliases) \
403 isTrunc8Rcvr, isAhRcvr, aliases) \
484 uint16_t Aliases[1 << NUM_ALIASES_BITS];
489 isTrunc8Rcvr, isAhRcvr, aliases) \
492 isTrunc8Rcvr, isAhRcvr, (SizeOf aliases).size(), aliases,
[all...] |
| IceTargetLoweringX8664Traits.h | 308 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
321 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
335 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
349 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
363 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
376 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
429 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
514 uint16_t Aliases[1 << NUM_ALIASES_BITS];
519 is16To8, isTrunc8Rcvr, isAhRcvr, aliases) \
522 is16To8, isTrunc8Rcvr, isAhRcvr, (SizeOf aliases).size(), aliases,
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenSchedule.h | 56 RecVec Aliases;
87 assert((!IsAlias || Aliases.empty()) && "Alias cannot have aliases");
|
| CodeGenRegisters.cpp | 140 std::vector<Record*> Aliases = TheDef->getValueAsListOfDefs("Aliases");
141 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
142 CodeGenRegister *Reg = RegBank.getReg(Aliases[i]);
384 // Finally, create units for leaf registers without ad hoc aliases. Note that
385 // a leaf register with ad hoc aliases doesn't get its own unit - it isn't
630 Field == "Aliases") {
[all...] |
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| AsmWriterEmitter.cpp | 834 std::vector<CodeGenInstAlias*> &Aliases = I->second;
837 II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) {
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 109 return Aliases(other) && (reg_size == other.reg_size);
113 inline bool CPURegister::Aliases(const CPURegister& other) const {
[all...] |
| /external/clang/include/clang/Basic/ |
| TargetInfo.h | 759 const char * const Aliases[5];
[all...] |
| /external/clang/lib/CodeGen/ |
| CodeGenModule.h | 324 std::vector<GlobalDecl> Aliases;
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/clang/include/clang/Basic/ |
| TargetInfo.h | 787 const char * const Aliases[5];
[all...] |
| /external/llvm/lib/Bitcode/Writer/ |
| BitcodeWriter.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 253 /// looking for aliasing nodes and adding them to the Aliases vector.
255 SmallVector<SDValue, 8> &Aliases);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 384 /// looking for aliasing nodes and adding them to the Aliases vector.
386 SmallVectorImpl<SDValue> &Aliases);
[all...] |
