1 /* 2 * Copyright 2013 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: Marek Olk <maraeo (at) gmail.com> 24 */ 25 26 #ifndef R600D_COMMON_H 27 #define R600D_COMMON_H 28 29 #define R600_CONFIG_REG_OFFSET 0x08000 30 #define R600_CONTEXT_REG_OFFSET 0x28000 31 #define SI_SH_REG_OFFSET 0x0000B000 32 #define SI_SH_REG_END 0x0000C000 33 #define CIK_UCONFIG_REG_OFFSET 0x00030000 34 #define CIK_UCONFIG_REG_END 0x00038000 35 36 #define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) 37 #define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) 38 #define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) 39 #define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) 40 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) 41 42 #define RADEON_CP_PACKET3_COMPUTE_MODE 0x00000002 43 44 #define PKT3_NOP 0x10 45 #define PKT3_SET_PREDICATION 0x20 46 #define PKT3_STRMOUT_BUFFER_UPDATE 0x34 47 #define STRMOUT_STORE_BUFFER_FILLED_SIZE 1 48 #define STRMOUT_OFFSET_SOURCE(x) (((unsigned)(x) & 0x3) << 1) 49 #define STRMOUT_OFFSET_FROM_PACKET 0 50 #define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1 51 #define STRMOUT_OFFSET_FROM_MEM 2 52 #define STRMOUT_OFFSET_NONE 3 53 #define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8) 54 #define PKT3_WAIT_REG_MEM 0x3C 55 #define WAIT_REG_MEM_EQUAL 3 56 #define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4) 57 #define PKT3_EVENT_WRITE 0x46 58 #define PKT3_EVENT_WRITE_EOP 0x47 59 #define EOP_DATA_SEL(x) ((x) << 29) 60 /* 0 - discard 61 * 1 - send low 32bit data 62 * 2 - send 64bit data 63 * 3 - send 64bit GPU counter value 64 * 4 - send 64bit sys counter value 65 */ 66 #define PKT3_SET_CONFIG_REG 0x68 67 #define PKT3_SET_CONTEXT_REG 0x69 68 #define PKT3_STRMOUT_BASE_UPDATE 0x72 /* r700 only */ 69 #define PKT3_SURFACE_BASE_UPDATE 0x73 /* r600 only */ 70 #define SURFACE_BASE_UPDATE_DEPTH (1 << 0) 71 #define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x)) 72 #define SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1) 73 #define SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x)) 74 #define PKT3_SET_SH_REG 0x76 /* SI and later */ 75 #define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */ 76 77 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */ 78 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */ 79 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */ 80 #define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 81 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 82 #define EVENT_TYPE_ZPASS_DONE 0x15 83 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 84 #define EVENT_TYPE_PERFCOUNTER_START 0x17 85 #define EVENT_TYPE_PERFCOUNTER_STOP 0x18 86 #define EVENT_TYPE_PIPELINESTAT_START 25 87 #define EVENT_TYPE_PIPELINESTAT_STOP 26 88 #define EVENT_TYPE_PERFCOUNTER_SAMPLE 0x1B 89 #define EVENT_TYPE_SAMPLE_PIPELINESTAT 30 90 #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f 91 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 92 #define EVENT_TYPE_BOTTOM_OF_PIPE_TS 40 93 #define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c /* supported on r700+ */ 94 #define EVENT_TYPE_FLUSH_AND_INV_CB_META 46 /* supported on r700+ */ 95 #define EVENT_TYPE(x) ((x) << 0) 96 #define EVENT_INDEX(x) ((x) << 8) 97 /* 0 - any non-TS event 98 * 1 - ZPASS_DONE 99 * 2 - SAMPLE_PIPELINESTAT 100 * 3 - SAMPLE_STREAMOUTSTAT* 101 * 4 - *S_PARTIAL_FLUSH 102 * 5 - TS events 103 */ 104 105 #define PREDICATION_OP_CLEAR 0x0 106 #define PREDICATION_OP_ZPASS 0x1 107 #define PREDICATION_OP_PRIMCOUNT 0x2 108 #define PRED_OP(x) ((x) << 16) 109 #define PREDICATION_CONTINUE (1 << 31) 110 #define PREDICATION_HINT_WAIT (0 << 12) 111 #define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) 112 #define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) 113 #define PREDICATION_DRAW_VISIBLE (1 << 8) 114 115 /* R600-R700*/ 116 #define R_008490_CP_STRMOUT_CNTL 0x008490 117 #define S_008490_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 118 #define R_028AB0_VGT_STRMOUT_EN 0x028AB0 119 #define S_028AB0_STREAMOUT(x) (((unsigned)(x) & 0x1) << 0) 120 #define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1) 121 #define C_028AB0_STREAMOUT 0xFFFFFFFE 122 #define R_028B20_VGT_STRMOUT_BUFFER_EN 0x028B20 123 #define S_028B20_BUFFER_0_EN(x) (((unsigned)(x) & 0x1) << 0) 124 #define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1) 125 #define C_028B20_BUFFER_0_EN 0xFFFFFFFE 126 #define S_028B20_BUFFER_1_EN(x) (((unsigned)(x) & 0x1) << 1) 127 #define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1) 128 #define C_028B20_BUFFER_1_EN 0xFFFFFFFD 129 #define S_028B20_BUFFER_2_EN(x) (((unsigned)(x) & 0x1) << 2) 130 #define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1) 131 #define C_028B20_BUFFER_2_EN 0xFFFFFFFB 132 #define S_028B20_BUFFER_3_EN(x) (((unsigned)(x) & 0x1) << 3) 133 #define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1) 134 #define C_028B20_BUFFER_3_EN 0xFFFFFFF7 135 #define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 136 137 #define V_0280A0_SWAP_STD 0x00000000 138 #define V_0280A0_SWAP_ALT 0x00000001 139 #define V_0280A0_SWAP_STD_REV 0x00000002 140 #define V_0280A0_SWAP_ALT_REV 0x00000003 141 142 /* EG+ */ 143 #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC 144 #define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 145 #define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 146 #define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) 147 #define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) 148 #define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE 149 #define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) 150 #define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) 151 #define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD 152 #define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) 153 #define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) 154 #define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB 155 #define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) 156 #define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) 157 #define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 158 #define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) 159 #define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) 160 #define C_028B94_RAST_STREAM 0xFFFFFF8F 161 #define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) /* SI+ */ 162 #define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) 163 #define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF 164 #define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) /* SI+ */ 165 #define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) 166 #define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF 167 #define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 168 #define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) 169 #define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) 170 #define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 171 #define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) 172 #define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) 173 #define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F 174 #define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) 175 #define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) 176 #define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF 177 #define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) 178 #define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) 179 #define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF 180 181 #define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C 182 #define EG_S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) 183 #define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 184 #define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 185 186 #define CM_R_028804_DB_EQAA 0x00028804 187 #define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 188 #define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) 189 #define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) 190 #define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) 191 #define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 192 #define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 193 #define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 194 #define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 195 #define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 196 #define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 197 #define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) 198 #define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) 199 #define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc 200 #define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 201 #define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 202 #define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF 203 #define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 204 #define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) 205 #define C_028BDC_LAST_PIXEL 0xFFFFFBFF 206 #define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) 207 #define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) 208 #define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF 209 #define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) 210 #define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) 211 #define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF 212 #define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 213 #define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) 214 #define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 215 #define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) 216 #define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) 217 #define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) 218 #define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 219 #define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 220 #define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 221 #define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 222 223 #define EG_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17) 224 #define SI_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) 225 226 /*CIK+*/ 227 #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC 228 229 #define R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x028C0C 230 #define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 231 #define R_02843C_PA_CL_VPORT_XSCALE 0x02843C 232 233 #define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 234 #define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 235 #define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) 236 #define C_028250_TL_X 0xFFFF8000 237 #define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 238 #define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) 239 #define C_028250_TL_Y 0x8000FFFF 240 #define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 241 #define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 242 #define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 243 #define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 244 #define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) 245 #define C_028254_BR_X 0xFFFF8000 246 #define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 247 #define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) 248 #define C_028254_BR_Y 0x8000FFFF 249 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 250 #define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 251 252 #endif 253
