| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/PeiServicesTablePointerLibMm7/ |
| PeiServicesTablePointer.c | 40 IA32_DESCRIPTOR Idtr;
43 AsmReadIdtr (&Idtr);
44 PeiServices = (EFI_PEI_SERVICES **)(UINTN)(*(UINTN*)(Idtr.Base - sizeof (UINTN)));
|
| /device/linaro/bootloader/edk2/MdePkg/Library/PeiServicesTablePointerLibIdt/ |
| PeiServicesTablePointer.c | 44 IA32_DESCRIPTOR Idtr;
46 AsmReadIdtr (&Idtr);
47 PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
71 IA32_DESCRIPTOR Idtr;
74 AsmReadIdtr (&Idtr);
75 (*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;
101 IA32_DESCRIPTOR Idtr;
108 AsmReadIdtr (&Idtr);
109 PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
117 EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),
[all...] |
| /device/linaro/bootloader/edk2/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/ |
| DispatchExecute.c | 93 IA32_DESCRIPTOR Idtr;
96 // Idtr might be changed inside of FSP. 32bit FSP only knows the <4G address.
97 // If IDTR.Base is >4G, FSP can not handle. So we need save/restore IDTR here for X64 only.
98 // Interrupt is already disabled here, so it is safety to update IDTR.
100 AsmReadIdtr (&Idtr);
102 AsmWriteIdtr (&Idtr);
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/SmmDebugAgent/ |
| SmmDebugAgentLib.c | 188 IA32_DESCRIPTOR Idtr;
338 AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
339 IdtEntryCount = (UINT16) ((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
341 Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
342 Idtr.Base = (UINTN) &mIdtEntryTable;
343 ZeroMem (&mIdtEntryTable, Idtr.Limit + 1);
344 AsmWriteIdtr ((IA32_DESCRIPTOR *) &Idtr);
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Include/Guid/ |
| AcpiS3Context.h | 59 IA32_DESCRIPTOR Idtr;
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/CapsulePei/X64/ |
| X64Entry.c | 150 IA32_DESCRIPTOR Idtr;
160 AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
164 PageFaultContext = (PAGE_FAULT_CONTEXT *) (UINTN) (Idtr.Base - sizeof (PAGE_FAULT_CONTEXT));
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgent/ |
| DxeDebugAgentLib.c | 252 IA32_DESCRIPTOR Idtr;
270 AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
271 IdtEntryCount = (UINT16) ((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
277 CopyMem (&mIdtEntryTable, (VOID *) Idtr.Base, Idtr.Limit + 1);
281 Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
282 Idtr.Base = (UINTN) &mIdtEntryTable;
283 AsmWriteIdtr ((IA32_DESCRIPTOR *) &Idtr);
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/BootScriptSaveOnS3SaveStateThunk/ |
| ScriptSave.c | 61 IA32_DESCRIPTOR Idtr;
66 AsmReadIdtr (&Idtr);
67 PeiServices = (VOID *)(UINTN)(*(UINT32 *)(Idtr.Base - sizeof (UINT32)));
[all...] |
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/ |
| AcpiS3Save.c | 509 IA32_DESCRIPTOR *Idtr;
536 Idtr = (IA32_DESCRIPTOR *)(IdtGate + 0x100);
537 Idtr->Base = (UINTN)IdtGate;
538 Idtr->Limit = (UINT16)(sizeof(IA32_IDT_GATE_DESCRIPTOR) * 0x100 - 1);
539 AcpiS3Context->IdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)Idtr;
543 (VOID *)(UINTN)Idtr,
|
| /device/linaro/bootloader/edk2/OvmfPkg/AcpiS3SaveDxe/ |
| AcpiS3Save.c | 399 IA32_DESCRIPTOR *Idtr;
421 Idtr = (IA32_DESCRIPTOR *)(IdtGate + 0x100);
422 Idtr->Base = (UINTN)IdtGate;
423 Idtr->Limit = (UINT16)(sizeof(IA32_IDT_GATE_DESCRIPTOR) * 0x100 - 1);
424 AcpiS3Context->IdtrProfile = (EFI_PHYSICAL_ADDRESS)(UINTN)Idtr;
428 (VOID *)(UINTN)Idtr,
|
| /device/linaro/bootloader/edk2/DuetPkg/BootSector/ |
| efi32.S | 51 sidt Idtr
57 movl (Idtr + 2), %esi
84 # mov eax, [offset Idtr + 2]
143 movzwl (Idtr), %eax # get size of IDT
145 addl (Idtr + 2), %eax # add to base of IDT to get location of memory map...
[all...] |
| efi32.asm | 53 sidt fword ptr [Idtr] ; get fword address of IDT
59 mov esi, [offset Idtr + 2]
86 ; mov eax, [offset Idtr + 2]
144 movzx eax, word ptr [Idtr] ; get size of IDT
146 add eax, dword ptr [Idtr + 2] ; add to base of IDT to get location of memory map...
576 Idtr df 0
|
| efi64.S | 62 movl $Idtr, %eax
71 movl $(Idtr + 2), %esi
100 # mov eax, [offset Idtr + 2]
162 movl $Idtr, %edx # get size of IDT
[all...] |
| efi64.asm | 60 mov eax, offset Idtr
68 mov esi, [offset Idtr + 2]
97 ; mov eax, [offset Idtr + 2]
158 mov edx, offset Idtr
780 Idtr df 0
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/ |
| PiSmmCpuDxeSmm.c | 665 IA32_DESCRIPTOR *Idtr;
722 Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;
724 mGdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);
727 mMachineCheckHandlerForAp = (VOID *) ((UINTN)mIdtForAp + (Idtr->Limit + 1));
730 CopyMem (mIdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/ |
| SmmBaseHelper.c | 417 IA32_DESCRIPTOR Idtr;
423 AsmReadIdtr (&Idtr);
424 IdtGateDesc = (IA32_IDT_GATE_DESCRIPTOR *) Idtr.Base;
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/CpuMpPei/ |
| CpuMpPei.h | 79 IA32_DESCRIPTOR Idtr; // offset 14 / 26
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Include/Ia32/ |
| ProcessorContext.h | 33 #define SOFT_DEBUGGER_REGISTER_IDTR0 0x0B // the low 32bit of IDTR
34 #define SOFT_DEBUGGER_REGISTER_IDTR1 0x0C // the high 32bot of IDTR
184 UINT32 Idtr[2];
275 UINT64 Idtr[2];
|
| /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
| DebugSupport.h | 116 UINT32 Idtr[2];
210 UINT64 Idtr[2];
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 118 UINT32 Idtr[2];
213 UINT64 Idtr[2];
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Guid/ |
| Cper.h | 642 UINT32 Idtr[2];
682 UINT64 Idtr[2];
[all...] |
