| /external/llvm/lib/Target/BPF/InstPrinter/ |
| BPFInstPrinter.cpp | 68 const MCOperand &RegOp = MI->getOperand(OpNo);
77 assert(RegOp.isReg() && "Register operand not a register");
78 O << '(' << getRegisterName(RegOp.getReg()) << ')';
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiAsmPrinter.cpp | 132 unsigned RegOp = OpNo + 1;
133 if (RegOp >= MI->getNumOperands())
135 const MachineOperand &MO = MI->getOperand(RegOp);
|
| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| LanaiInstPrinter.cpp | 211 const MCOperand &RegOp) {
212 assert(RegOp.isReg() && "Register operand expected");
216 OS << "%" << LanaiInstPrinter::getRegisterName(RegOp.getReg());
237 const MCOperand &RegOp = MI->getOperand(OpNo);
246 printMemoryBaseRegister(OS, AluCode, RegOp);
252 const MCOperand &RegOp = MI->getOperand(OpNo);
256 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected.");
262 OS << "%" << getRegisterName(RegOp.getReg());
273 const MCOperand &RegOp = MI->getOperand(OpNo);
282 printMemoryBaseRegister(OS, AluCode, RegOp);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86MCInstLower.cpp | 260 unsigned RegOp = IsStore ? 0 : 5;
262 assert(Inst.getNumOperands() == 6 && Inst.getOperand(RegOp).isReg() &&
272 unsigned Reg = Inst.getOperand(RegOp).getReg();
|
| X86InstrInfo.cpp | 65 // Used for RegOp->MemOp conversion.
73 // Do not insert the reverse map (MemOp -> RegOp) into the table.
77 // Do not insert the forward map (RegOp -> MemOp) into the table.
263 unsigned RegOp = OpTbl2Addr[i][0];
267 RegOp, MemOp,
373 unsigned RegOp = OpTbl0[i][0];
377 RegOp, MemOp, TB_INDEX_0 | Flags);
533 unsigned RegOp = OpTbl1[i][0];
537 RegOp, MemOp,
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | 511 const MachineOperand RegOp = DVInsn->getOperand(0);
514 MachineLocation Location(RegOp.getReg(),
517 } else if (RegOp.getReg())
518 addVariableAddress(DV, *VariableDie, MachineLocation(RegOp.getReg()));
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 498 unsigned RegOp = OpNum;
504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
510 RegOp = OpNum + 1;
512 if (RegOp >= MI->getNumOperands())
514 const MachineOperand &MO = MI->getOperand(RegOp);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | 361 unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
362 if (RegOp >= MI->getNumOperands())
364 const MachineOperand &MO = MI->getOperand(RegOp);
[all...] |
| /external/llvm/lib/Target/Lanai/AsmParser/ |
| LanaiAsmParser.cpp | 105 struct RegOp {
122 struct RegOp Reg;
[all...] |
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| SparcAsmParser.cpp | 201 struct RegOp {
218 struct RegOp Reg;
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 44 struct RegOp {
64 struct RegOp Reg;
|
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 310 unsigned RegOp = IsStore ? 0 : 5;
312 assert(Inst.getNumOperands() == 6 && Inst.getOperand(RegOp).isReg() &&
322 unsigned Reg = Inst.getOperand(RegOp).getReg();
[all...] |
| X86InstrInfo.cpp | 83 // Do not insert the reverse map (MemOp -> RegOp) into the table.
87 // Do not insert the forward map (RegOp -> MemOp) into the table.
96 // Used for RegOp->MemOp conversion.
107 uint16_t RegOp;
289 Entry.RegOp, Entry.MemOp,
444 Entry.RegOp, Entry.MemOp, TB_INDEX_0 | Entry.Flags);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | 486 unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
487 if (RegOp >= MI->getNumOperands())
489 const MachineOperand &MO = MI->getOperand(RegOp);
[all...] |
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 86 struct RegOp {
113 RegOp Reg;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveIntervalAnalysis.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| AMDGPUAsmParser.cpp | 145 struct RegOp {
156 RegOp Reg;
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 177 struct RegOp {
252 struct RegOp Reg;
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 488 struct RegOp {
572 struct RegOp Reg;
[all...] |
