| /external/llvm/lib/CodeGen/GlobalISel/ |
| RegisterBankInfo.cpp | 104 for (MVT::SimpleValueType SVT :
106 recordRegBankForType(getRegBank(ID), SVT);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 263 EVT SVT = VT;
264 while (SVT != MVT::f32 && SVT != MVT::f16) {
265 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
266 if (ConstantFPSDNode::isValueValidForType(SVT, CFP->getValueAPF()) &&
269 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) &&
271 Type *SType = SVT.getTypeForEVT(*DAG.getContext());
273 VT = SVT;
[all...] |
| LegalizeFloatTypes.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 216 EVT SVT = getSetCCResultType(N->getOperand(2).getValueType());
221 if (!TLI.isTypeLegal(SVT))
222 SVT = NVT;
224 SDVTList VTs = DAG.getVTList(N->getValueType(0), SVT, MVT::Other);
595 EVT SVT = getSetCCResultType(N->getOperand(0).getValueType());
601 if (!TLI.isTypeLegal(SVT))
602 SVT = NVT;
605 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
620 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, LHS, RHS,
623 assert(NVT.bitsLE(SVT) && "Integer type overpromoted?")
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 355 EVT SVT = VT;
356 while (SVT != MVT::f32) {
357 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
358 if (ConstantFPSDNode::isValueValidForType(SVT, CFP->getValueAPF()) &&
361 TLI.isLoadExtLegal(ISD::EXTLOAD, SVT) &&
363 Type *SType = SVT.getTypeForEVT(*DAG.getContext());
365 VT = SVT;
[all...] |
| LegalizeFloatTypes.cpp | 541 EVT SVT = N->getOperand(0).getValueType();
554 if (NVT.bitsGE(SVT))
702 EVT SVT = N->getOperand(0).getValueType();
705 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, RVT);
[all...] |
| TargetLowering.cpp | 845 EVT SVT = (MVT::SimpleValueType)nVT;
848 if (SVT.getVectorElementType().getSizeInBits() > EltVT.getSizeInBits()
849 && SVT.getVectorNumElements() == NElts &&
850 isTypeLegal(SVT) && SVT.getScalarType().isInteger()) {
851 TransformToType[i] = SVT;
852 RegisterTypeForVT[i] = SVT;
[all...] |
| LegalizeIntegerTypes.cpp | 505 EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType());
511 if (!TLI.isTypeLegal(SVT))
512 SVT = NVT;
515 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
519 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0),
522 assert(NVT.bitsLE(SVT) && "Integer type overpromoted?");
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | [all...] |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 337 MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy;
349 switch (SVT) {
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCalls.cpp | 297 auto SVT = VT->getElementType();
299 unsigned BitWidth = SVT->getPrimitiveSizeInBits();
316 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth));
368 auto SVT = VT->getVectorElementType();
370 int BitWidth = SVT->getIntegerBitWidth();
407 ConstantVec.push_back(UndefValue::get(SVT));
410 ConstantVec.push_back(ConstantInt::getNullValue(SVT));
424 ShiftVecAmts.push_back(UndefValue::get(SVT));
426 ShiftVecAmts.push_back(ConstantInt::get(SVT, Idx));
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.cpp | 235 MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy;
236 return SVT == MVT::i64 || SVT == MVT::i32 || SVT == MVT::i16;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
