/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 160 MachineOperand &Src2 = MI.getOperand(2); 164 unsigned SrcReg = Src2.getReg(); 177 MachineOperand &Src2 = MI.getOperand(2); 178 if (Src2.getImm() != 32)
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HexagonGenMux.cpp | 97 const MachineOperand &Src2) const; 176 const MachineOperand &Src2) const { 177 bool IsReg1 = Src1.isReg(), IsReg2 = Src2.isReg(); 185 if (Src2.isImm() && isInt<8>(Src2.getImm())) 266 MachineOperand *Src1 = &Def1.getOperand(2), *Src2 = &Def2.getOperand(2); 268 unsigned SR2 = Src2->isReg() ? Src2->getReg() : 0; 284 MachineOperand *SrcT = (MinX == CI.TrueX) ? Src1 : Src2; 285 MachineOperand *SrcF = (MinX == CI.FalseX) ? Src1 : Src2; [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIShrinkInstructions.cpp | 84 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); 91 if (Src2) { 96 if (!isVGPR(Src2, TRI, MRI) || 348 const MachineOperand *Src2 = 349 TII->getNamedOperand(MI, AMDGPU::OpName::src2); 350 if (!Src2->isReg()) 352 unsigned SReg = Src2->getReg(); 386 const MachineOperand *Src2 = 387 TII->getNamedOperand(MI, AMDGPU::OpName::src2); [all...] |
SIInstrInfo.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86FixupLEAs.cpp | 153 // if src1 != src2, then convertToThreeAddress will 378 const MachineOperand &Src2 = MI.getOperand(SrcR1 == DstR ? 3 : 1); 382 .addOperand(Src2);
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X86InstrInfo.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/external/swiftshader/third_party/subzero/src/ |
IceInstX86BaseImpl.h | 278 Operand *Src2) 281 this->addSource(Src2); 863 // Src2 can be the implicit CL register or an immediate. [all...] |
IceTargetLowering.h | 587 auto *Src2 = thunk2(); 588 return insertScalarInstruction(Res, Src0, Src1, Src2);
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IceTargetLoweringMIPS32.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/clang/lib/CodeGen/ |
CGBuiltin.cpp | 249 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 252 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |