/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 135 unsigned BaseReg; 181 return Mem.BaseReg; 344 Res->Mem.BaseReg = 0; 352 unsigned BaseReg, unsigned IndexReg, 356 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!"); 364 Res->Mem.BaseReg = BaseReg; 374 unsigned basereg = is64BitMode() ? X86::RSI : X86::ESI; local 380 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0) 384 unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI; local [all...] |
/toolchain/binutils/binutils-2.25/gas/config/ |
tc-i370.c | 2053 int basereg = -1; local [all...] |
tc-alpha.c | 1247 int basereg = *pbasereg; local 1669 int basereg; local 2174 int basereg; local 2219 int basereg; local 2273 int basereg; local 2425 int basereg; local 2847 int basereg = alpha_gp_register; local [all...] |
tc-arm.c | 2278 struct reg_entry *basereg; local [all...] |
/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 264 unsigned BaseReg, IndexReg, TmpReg, Scale; 274 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0), 278 unsigned getBaseReg() { return BaseReg; } 382 // If we already have a BaseReg, then assume this is the IndexReg with 384 if (!BaseReg) { 385 BaseReg = TmpReg; 387 assert (!IndexReg && "BaseReg/IndexReg already set!"); 419 // If we already have a BaseReg, then assume this is the IndexReg with 421 if (!BaseReg) { 422 BaseReg = TmpReg 995 unsigned basereg = local 1004 unsigned basereg = local [all...] |