1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2012 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 /****************************************************************************** 20 * 21 * This file contains function of the HCIC unit to format and send HCI 22 * commands. 23 * 24 ******************************************************************************/ 25 26 #include "bt_common.h" 27 #include "bt_target.h" 28 #include "btu.h" 29 #include "hcidefs.h" 30 #include "hcimsgs.h" 31 32 #include <base/bind.h> 33 #include <stddef.h> 34 #include <string.h> 35 36 void btsnd_hcic_ble_set_local_used_feat(uint8_t feat_set[8]) { 37 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 38 uint8_t* pp = (uint8_t*)(p + 1); 39 40 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_USED_FEAT_CMD; 41 p->offset = 0; 42 43 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_LOCAL_SPT_FEAT); 44 ARRAY_TO_STREAM(pp, feat_set, HCIC_PARAM_SIZE_SET_USED_FEAT_CMD); 45 46 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 47 } 48 49 void btsnd_hcic_ble_set_random_addr(const RawAddress& random_bda) { 50 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 51 uint8_t* pp = (uint8_t*)(p + 1); 52 53 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD; 54 p->offset = 0; 55 56 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_RANDOM_ADDR); 57 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD); 58 59 BDADDR_TO_STREAM(pp, random_bda); 60 61 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 62 } 63 64 void btsnd_hcic_ble_write_adv_params(uint16_t adv_int_min, uint16_t adv_int_max, 65 uint8_t adv_type, uint8_t addr_type_own, 66 uint8_t addr_type_dir, 67 const RawAddress& direct_bda, 68 uint8_t channel_map, 69 uint8_t adv_filter_policy) { 70 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 71 uint8_t* pp = (uint8_t*)(p + 1); 72 73 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS; 74 p->offset = 0; 75 76 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_PARAMS); 77 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS); 78 79 UINT16_TO_STREAM(pp, adv_int_min); 80 UINT16_TO_STREAM(pp, adv_int_max); 81 UINT8_TO_STREAM(pp, adv_type); 82 UINT8_TO_STREAM(pp, addr_type_own); 83 UINT8_TO_STREAM(pp, addr_type_dir); 84 BDADDR_TO_STREAM(pp, direct_bda); 85 UINT8_TO_STREAM(pp, channel_map); 86 UINT8_TO_STREAM(pp, adv_filter_policy); 87 88 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 89 } 90 void btsnd_hcic_ble_read_adv_chnl_tx_power(void) { 91 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 92 uint8_t* pp = (uint8_t*)(p + 1); 93 94 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 95 p->offset = 0; 96 97 UINT16_TO_STREAM(pp, HCI_BLE_READ_ADV_CHNL_TX_POWER); 98 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD); 99 100 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 101 } 102 103 void btsnd_hcic_ble_set_adv_data(uint8_t data_len, uint8_t* p_data) { 104 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 105 uint8_t* pp = (uint8_t*)(p + 1); 106 107 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1; 108 p->offset = 0; 109 110 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_DATA); 111 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1); 112 113 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA); 114 115 if (p_data != NULL && data_len > 0) { 116 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA) 117 data_len = HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA; 118 119 UINT8_TO_STREAM(pp, data_len); 120 121 ARRAY_TO_STREAM(pp, p_data, data_len); 122 } 123 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 124 } 125 void btsnd_hcic_ble_set_scan_rsp_data(uint8_t data_len, uint8_t* p_scan_rsp) { 126 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 127 uint8_t* pp = (uint8_t*)(p + 1); 128 129 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1; 130 p->offset = 0; 131 132 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_RSP_DATA); 133 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1); 134 135 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP); 136 137 if (p_scan_rsp != NULL && data_len > 0) { 138 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP) 139 data_len = HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP; 140 141 UINT8_TO_STREAM(pp, data_len); 142 143 ARRAY_TO_STREAM(pp, p_scan_rsp, data_len); 144 } 145 146 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 147 } 148 149 void btsnd_hcic_ble_set_adv_enable(uint8_t adv_enable) { 150 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 151 uint8_t* pp = (uint8_t*)(p + 1); 152 153 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_ADV_ENABLE; 154 p->offset = 0; 155 156 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_ENABLE); 157 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_ADV_ENABLE); 158 159 UINT8_TO_STREAM(pp, adv_enable); 160 161 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 162 } 163 void btsnd_hcic_ble_set_scan_params(uint8_t scan_type, uint16_t scan_int, 164 uint16_t scan_win, uint8_t addr_type_own, 165 uint8_t scan_filter_policy) { 166 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 167 uint8_t* pp = (uint8_t*)(p + 1); 168 169 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM; 170 p->offset = 0; 171 172 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_PARAMS); 173 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM); 174 175 UINT8_TO_STREAM(pp, scan_type); 176 UINT16_TO_STREAM(pp, scan_int); 177 UINT16_TO_STREAM(pp, scan_win); 178 UINT8_TO_STREAM(pp, addr_type_own); 179 UINT8_TO_STREAM(pp, scan_filter_policy); 180 181 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 182 } 183 184 void btsnd_hcic_ble_set_scan_enable(uint8_t scan_enable, uint8_t duplicate) { 185 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 186 uint8_t* pp = (uint8_t*)(p + 1); 187 188 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE; 189 p->offset = 0; 190 191 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_ENABLE); 192 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE); 193 194 UINT8_TO_STREAM(pp, scan_enable); 195 UINT8_TO_STREAM(pp, duplicate); 196 197 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 198 } 199 200 /* link layer connection management commands */ 201 void btsnd_hcic_ble_create_ll_conn( 202 uint16_t scan_int, uint16_t scan_win, uint8_t init_filter_policy, 203 uint8_t addr_type_peer, const RawAddress& bda_peer, uint8_t addr_type_own, 204 uint16_t conn_int_min, uint16_t conn_int_max, uint16_t conn_latency, 205 uint16_t conn_timeout, uint16_t min_ce_len, uint16_t max_ce_len) { 206 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 207 uint8_t* pp = (uint8_t*)(p + 1); 208 209 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN; 210 p->offset = 0; 211 212 UINT16_TO_STREAM(pp, HCI_BLE_CREATE_LL_CONN); 213 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN); 214 215 UINT16_TO_STREAM(pp, scan_int); 216 UINT16_TO_STREAM(pp, scan_win); 217 UINT8_TO_STREAM(pp, init_filter_policy); 218 219 UINT8_TO_STREAM(pp, addr_type_peer); 220 BDADDR_TO_STREAM(pp, bda_peer); 221 UINT8_TO_STREAM(pp, addr_type_own); 222 223 UINT16_TO_STREAM(pp, conn_int_min); 224 UINT16_TO_STREAM(pp, conn_int_max); 225 UINT16_TO_STREAM(pp, conn_latency); 226 UINT16_TO_STREAM(pp, conn_timeout); 227 228 UINT16_TO_STREAM(pp, min_ce_len); 229 UINT16_TO_STREAM(pp, max_ce_len); 230 231 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 232 } 233 234 void btsnd_hcic_ble_create_conn_cancel(void) { 235 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 236 uint8_t* pp = (uint8_t*)(p + 1); 237 238 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL; 239 p->offset = 0; 240 241 UINT16_TO_STREAM(pp, HCI_BLE_CREATE_CONN_CANCEL); 242 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL); 243 244 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 245 } 246 247 void btsnd_hcic_ble_clear_white_list(void) { 248 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 249 uint8_t* pp = (uint8_t*)(p + 1); 250 251 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CLEAR_WHITE_LIST; 252 p->offset = 0; 253 254 UINT16_TO_STREAM(pp, HCI_BLE_CLEAR_WHITE_LIST); 255 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CLEAR_WHITE_LIST); 256 257 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 258 } 259 260 void btsnd_hcic_ble_add_white_list(uint8_t addr_type, const RawAddress& bda) { 261 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 262 uint8_t* pp = (uint8_t*)(p + 1); 263 264 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_WHITE_LIST; 265 p->offset = 0; 266 267 UINT16_TO_STREAM(pp, HCI_BLE_ADD_WHITE_LIST); 268 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ADD_WHITE_LIST); 269 270 UINT8_TO_STREAM(pp, addr_type); 271 BDADDR_TO_STREAM(pp, bda); 272 273 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 274 } 275 276 void btsnd_hcic_ble_remove_from_white_list(uint8_t addr_type, 277 const RawAddress& bda) { 278 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 279 uint8_t* pp = (uint8_t*)(p + 1); 280 281 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REMOVE_WHITE_LIST; 282 p->offset = 0; 283 284 UINT16_TO_STREAM(pp, HCI_BLE_REMOVE_WHITE_LIST); 285 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REMOVE_WHITE_LIST); 286 287 UINT8_TO_STREAM(pp, addr_type); 288 BDADDR_TO_STREAM(pp, bda); 289 290 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 291 } 292 293 void btsnd_hcic_ble_upd_ll_conn_params(uint16_t handle, uint16_t conn_int_min, 294 uint16_t conn_int_max, 295 uint16_t conn_latency, 296 uint16_t conn_timeout, 297 uint16_t min_ce_len, 298 uint16_t max_ce_len) { 299 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 300 uint8_t* pp = (uint8_t*)(p + 1); 301 302 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS; 303 p->offset = 0; 304 305 UINT16_TO_STREAM(pp, HCI_BLE_UPD_LL_CONN_PARAMS); 306 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS); 307 308 UINT16_TO_STREAM(pp, handle); 309 310 UINT16_TO_STREAM(pp, conn_int_min); 311 UINT16_TO_STREAM(pp, conn_int_max); 312 UINT16_TO_STREAM(pp, conn_latency); 313 UINT16_TO_STREAM(pp, conn_timeout); 314 UINT16_TO_STREAM(pp, min_ce_len); 315 UINT16_TO_STREAM(pp, max_ce_len); 316 317 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 318 } 319 320 void btsnd_hcic_ble_set_host_chnl_class( 321 uint8_t chnl_map[HCIC_BLE_CHNL_MAP_SIZE]) { 322 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 323 uint8_t* pp = (uint8_t*)(p + 1); 324 325 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS; 326 p->offset = 0; 327 328 UINT16_TO_STREAM(pp, HCI_BLE_SET_HOST_CHNL_CLASS); 329 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS); 330 331 ARRAY_TO_STREAM(pp, chnl_map, HCIC_BLE_CHNL_MAP_SIZE); 332 333 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 334 } 335 336 void btsnd_hcic_ble_read_chnl_map(uint16_t handle) { 337 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 338 uint8_t* pp = (uint8_t*)(p + 1); 339 340 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CHNL_MAP; 341 p->offset = 0; 342 343 UINT16_TO_STREAM(pp, HCI_BLE_READ_CHNL_MAP); 344 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CHNL_MAP); 345 346 UINT16_TO_STREAM(pp, handle); 347 348 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 349 } 350 351 void btsnd_hcic_ble_read_remote_feat(uint16_t handle) { 352 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 353 uint8_t* pp = (uint8_t*)(p + 1); 354 355 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT; 356 p->offset = 0; 357 358 UINT16_TO_STREAM(pp, HCI_BLE_READ_REMOTE_FEAT); 359 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT); 360 361 UINT16_TO_STREAM(pp, handle); 362 363 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 364 } 365 366 /* security management commands */ 367 void btsnd_hcic_ble_encrypt(uint8_t* key, uint8_t key_len, uint8_t* plain_text, 368 uint8_t pt_len, void* p_cmd_cplt_cback) { 369 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 370 uint8_t* pp = (uint8_t*)(p + 1); 371 372 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENCRYPT; 373 p->offset = sizeof(void*); 374 375 *((void**)pp) = 376 p_cmd_cplt_cback; /* Store command complete callback in buffer */ 377 pp += sizeof(void*); /* Skip over callback pointer */ 378 379 UINT16_TO_STREAM(pp, HCI_BLE_ENCRYPT); 380 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENCRYPT); 381 382 memset(pp, 0, HCIC_PARAM_SIZE_BLE_ENCRYPT); 383 384 if (key_len > HCIC_BLE_ENCRYT_KEY_SIZE) key_len = HCIC_BLE_ENCRYT_KEY_SIZE; 385 if (pt_len > HCIC_BLE_ENCRYT_KEY_SIZE) pt_len = HCIC_BLE_ENCRYT_KEY_SIZE; 386 387 ARRAY_TO_STREAM(pp, key, key_len); 388 pp += (HCIC_BLE_ENCRYT_KEY_SIZE - key_len); 389 ARRAY_TO_STREAM(pp, plain_text, pt_len); 390 391 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 392 } 393 394 void btsnd_hcic_ble_rand(base::Callback<void(BT_OCTET8)> cb) { 395 btu_hcif_send_cmd_with_cb(FROM_HERE, HCI_BLE_RAND, nullptr, 0, 396 base::Bind( 397 [](base::Callback<void(BT_OCTET8)> cb, 398 uint8_t* param, uint16_t param_len) { 399 CHECK(param[0] == 0) 400 << "LE Rand return status must be zero"; 401 cb.Run(param + 1 /* skip status */); 402 }, 403 std::move(cb))); 404 } 405 406 void btsnd_hcic_ble_start_enc(uint16_t handle, 407 uint8_t rand[HCIC_BLE_RAND_DI_SIZE], 408 uint16_t ediv, 409 uint8_t ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) { 410 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 411 uint8_t* pp = (uint8_t*)(p + 1); 412 413 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_START_ENC; 414 p->offset = 0; 415 416 UINT16_TO_STREAM(pp, HCI_BLE_START_ENC); 417 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_START_ENC); 418 419 UINT16_TO_STREAM(pp, handle); 420 ARRAY_TO_STREAM(pp, rand, HCIC_BLE_RAND_DI_SIZE); 421 UINT16_TO_STREAM(pp, ediv); 422 ARRAY_TO_STREAM(pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE); 423 424 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 425 } 426 427 void btsnd_hcic_ble_ltk_req_reply(uint16_t handle, 428 uint8_t ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) { 429 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 430 uint8_t* pp = (uint8_t*)(p + 1); 431 432 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_REPLY; 433 p->offset = 0; 434 435 UINT16_TO_STREAM(pp, HCI_BLE_LTK_REQ_REPLY); 436 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LTK_REQ_REPLY); 437 438 UINT16_TO_STREAM(pp, handle); 439 ARRAY_TO_STREAM(pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE); 440 441 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 442 } 443 444 void btsnd_hcic_ble_ltk_req_neg_reply(uint16_t handle) { 445 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 446 uint8_t* pp = (uint8_t*)(p + 1); 447 448 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY; 449 p->offset = 0; 450 451 UINT16_TO_STREAM(pp, HCI_BLE_LTK_REQ_NEG_REPLY); 452 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY); 453 454 UINT16_TO_STREAM(pp, handle); 455 456 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 457 } 458 459 void btsnd_hcic_ble_receiver_test(uint8_t rx_freq) { 460 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 461 uint8_t* pp = (uint8_t*)(p + 1); 462 463 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1; 464 p->offset = 0; 465 466 UINT16_TO_STREAM(pp, HCI_BLE_RECEIVER_TEST); 467 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1); 468 469 UINT8_TO_STREAM(pp, rx_freq); 470 471 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 472 } 473 474 void btsnd_hcic_ble_transmitter_test(uint8_t tx_freq, uint8_t test_data_len, 475 uint8_t payload) { 476 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 477 uint8_t* pp = (uint8_t*)(p + 1); 478 479 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3; 480 p->offset = 0; 481 482 UINT16_TO_STREAM(pp, HCI_BLE_TRANSMITTER_TEST); 483 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM3); 484 485 UINT8_TO_STREAM(pp, tx_freq); 486 UINT8_TO_STREAM(pp, test_data_len); 487 UINT8_TO_STREAM(pp, payload); 488 489 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 490 } 491 492 void btsnd_hcic_ble_test_end(void) { 493 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 494 uint8_t* pp = (uint8_t*)(p + 1); 495 496 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 497 p->offset = 0; 498 499 UINT16_TO_STREAM(pp, HCI_BLE_TEST_END); 500 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD); 501 502 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 503 } 504 505 void btsnd_hcic_ble_read_host_supported(void) { 506 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 507 uint8_t* pp = (uint8_t*)(p + 1); 508 509 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 510 p->offset = 0; 511 512 UINT16_TO_STREAM(pp, HCI_READ_LE_HOST_SUPPORT); 513 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD); 514 515 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 516 } 517 518 #if (BLE_LLT_INCLUDED == TRUE) 519 520 void btsnd_hcic_ble_rc_param_req_reply(uint16_t handle, uint16_t conn_int_min, 521 uint16_t conn_int_max, 522 uint16_t conn_latency, 523 uint16_t conn_timeout, 524 uint16_t min_ce_len, 525 uint16_t max_ce_len) { 526 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 527 uint8_t* pp = (uint8_t*)(p + 1); 528 529 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY; 530 p->offset = 0; 531 532 UINT16_TO_STREAM(pp, HCI_BLE_RC_PARAM_REQ_REPLY); 533 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY); 534 535 UINT16_TO_STREAM(pp, handle); 536 UINT16_TO_STREAM(pp, conn_int_min); 537 UINT16_TO_STREAM(pp, conn_int_max); 538 UINT16_TO_STREAM(pp, conn_latency); 539 UINT16_TO_STREAM(pp, conn_timeout); 540 UINT16_TO_STREAM(pp, min_ce_len); 541 UINT16_TO_STREAM(pp, max_ce_len); 542 543 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 544 } 545 546 void btsnd_hcic_ble_rc_param_req_neg_reply(uint16_t handle, uint8_t reason) { 547 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 548 uint8_t* pp = (uint8_t*)(p + 1); 549 550 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY; 551 p->offset = 0; 552 553 UINT16_TO_STREAM(pp, HCI_BLE_RC_PARAM_REQ_NEG_REPLY); 554 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY); 555 556 UINT16_TO_STREAM(pp, handle); 557 UINT8_TO_STREAM(pp, reason); 558 559 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 560 } 561 #endif 562 563 void btsnd_hcic_ble_add_device_resolving_list( 564 uint8_t addr_type_peer, const RawAddress& bda_peer, 565 uint8_t irk_peer[HCIC_BLE_IRK_SIZE], uint8_t irk_local[HCIC_BLE_IRK_SIZE]) { 566 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 567 uint8_t* pp = (uint8_t*)(p + 1); 568 569 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST; 570 p->offset = 0; 571 572 UINT16_TO_STREAM(pp, HCI_BLE_ADD_DEV_RESOLVING_LIST); 573 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST); 574 UINT8_TO_STREAM(pp, addr_type_peer); 575 BDADDR_TO_STREAM(pp, bda_peer); 576 ARRAY_TO_STREAM(pp, irk_peer, HCIC_BLE_ENCRYT_KEY_SIZE); 577 ARRAY_TO_STREAM(pp, irk_local, HCIC_BLE_ENCRYT_KEY_SIZE); 578 579 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 580 } 581 582 void btsnd_hcic_ble_rm_device_resolving_list(uint8_t addr_type_peer, 583 const RawAddress& bda_peer) { 584 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 585 uint8_t* pp = (uint8_t*)(p + 1); 586 587 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST; 588 p->offset = 0; 589 590 UINT16_TO_STREAM(pp, HCI_BLE_RM_DEV_RESOLVING_LIST); 591 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST); 592 UINT8_TO_STREAM(pp, addr_type_peer); 593 BDADDR_TO_STREAM(pp, bda_peer); 594 595 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 596 } 597 598 void btsnd_hcic_ble_set_privacy_mode(uint8_t addr_type_peer, 599 const RawAddress& bda_peer, 600 uint8_t privacy_type) { 601 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 602 uint8_t* pp = (uint8_t*)(p + 1); 603 604 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_PRIVACY_MODE; 605 p->offset = 0; 606 607 UINT16_TO_STREAM(pp, HCI_BLE_SET_PRIVACY_MODE); 608 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_PRIVACY_MODE); 609 UINT8_TO_STREAM(pp, addr_type_peer); 610 BDADDR_TO_STREAM(pp, bda_peer); 611 UINT8_TO_STREAM(pp, privacy_type); 612 613 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 614 } 615 616 void btsnd_hcic_ble_clear_resolving_list(void) { 617 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 618 uint8_t* pp = (uint8_t*)(p + 1); 619 620 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST; 621 p->offset = 0; 622 623 UINT16_TO_STREAM(pp, HCI_BLE_CLEAR_RESOLVING_LIST); 624 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST); 625 626 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 627 } 628 629 void btsnd_hcic_ble_read_resolvable_addr_peer(uint8_t addr_type_peer, 630 const RawAddress& bda_peer) { 631 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 632 uint8_t* pp = (uint8_t*)(p + 1); 633 634 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER; 635 p->offset = 0; 636 637 UINT16_TO_STREAM(pp, HCI_BLE_READ_RESOLVABLE_ADDR_PEER); 638 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER); 639 UINT8_TO_STREAM(pp, addr_type_peer); 640 BDADDR_TO_STREAM(pp, bda_peer); 641 642 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 643 } 644 645 void btsnd_hcic_ble_read_resolvable_addr_local(uint8_t addr_type_peer, 646 const RawAddress& bda_peer) { 647 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 648 uint8_t* pp = (uint8_t*)(p + 1); 649 650 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL; 651 p->offset = 0; 652 653 UINT16_TO_STREAM(pp, HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL); 654 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL); 655 UINT8_TO_STREAM(pp, addr_type_peer); 656 BDADDR_TO_STREAM(pp, bda_peer); 657 658 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 659 } 660 661 void btsnd_hcic_ble_set_addr_resolution_enable(uint8_t addr_resolution_enable) { 662 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 663 uint8_t* pp = (uint8_t*)(p + 1); 664 665 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE; 666 p->offset = 0; 667 668 UINT16_TO_STREAM(pp, HCI_BLE_SET_ADDR_RESOLUTION_ENABLE); 669 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE); 670 UINT8_TO_STREAM(pp, addr_resolution_enable); 671 672 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 673 } 674 675 void btsnd_hcic_ble_set_rand_priv_addr_timeout(uint16_t rpa_timout) { 676 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 677 uint8_t* pp = (uint8_t*)(p + 1); 678 679 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT; 680 p->offset = 0; 681 682 UINT16_TO_STREAM(pp, HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT); 683 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT); 684 UINT16_TO_STREAM(pp, rpa_timout); 685 686 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 687 } 688 689 void btsnd_hcic_ble_set_data_length(uint16_t conn_handle, uint16_t tx_octets, 690 uint16_t tx_time) { 691 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 692 uint8_t* pp = (uint8_t*)(p + 1); 693 694 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH; 695 p->offset = 0; 696 697 UINT16_TO_STREAM(pp, HCI_BLE_SET_DATA_LENGTH); 698 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH); 699 700 UINT16_TO_STREAM(pp, conn_handle); 701 UINT16_TO_STREAM(pp, tx_octets); 702 UINT16_TO_STREAM(pp, tx_time); 703 704 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 705 } 706 707 void btsnd_hcic_ble_enh_rx_test(uint8_t rx_chan, uint8_t phy, 708 uint8_t mod_index) { 709 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 710 uint8_t* pp = (uint8_t*)(p + 1); 711 712 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENH_RX_TEST; 713 p->offset = 0; 714 715 UINT16_TO_STREAM(pp, HCI_BLE_ENH_RECEIVER_TEST); 716 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENH_RX_TEST); 717 718 UINT8_TO_STREAM(pp, rx_chan); 719 UINT8_TO_STREAM(pp, phy); 720 UINT8_TO_STREAM(pp, mod_index); 721 722 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 723 } 724 725 void btsnd_hcic_ble_enh_tx_test(uint8_t tx_chan, uint8_t data_len, 726 uint8_t payload, uint8_t phy) { 727 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 728 uint8_t* pp = (uint8_t*)(p + 1); 729 730 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENH_TX_TEST; 731 p->offset = 0; 732 733 UINT16_TO_STREAM(pp, HCI_BLE_ENH_TRANSMITTER_TEST); 734 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENH_TX_TEST); 735 UINT8_TO_STREAM(pp, tx_chan); 736 UINT8_TO_STREAM(pp, data_len); 737 UINT8_TO_STREAM(pp, payload); 738 UINT8_TO_STREAM(pp, phy); 739 740 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 741 } 742 743 void btsnd_hcic_ble_set_extended_scan_params(uint8_t own_address_type, 744 uint8_t scanning_filter_policy, 745 uint8_t scanning_phys, 746 scanning_phy_cfg* phy_cfg) { 747 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 748 uint8_t* pp = (uint8_t*)(p + 1); 749 750 int phy_cnt = 751 std::bitset<std::numeric_limits<uint8_t>::digits>(scanning_phys).count(); 752 753 uint16_t param_len = 3 + (5 * phy_cnt); 754 p->len = HCIC_PREAMBLE_SIZE + param_len; 755 p->offset = 0; 756 757 UINT16_TO_STREAM(pp, HCI_LE_SET_EXTENDED_SCAN_PARAMETERS); 758 UINT8_TO_STREAM(pp, param_len); 759 760 UINT8_TO_STREAM(pp, own_address_type); 761 UINT8_TO_STREAM(pp, scanning_filter_policy); 762 UINT8_TO_STREAM(pp, scanning_phys); 763 764 for (int i = 0; i < phy_cnt; i++) { 765 UINT8_TO_STREAM(pp, phy_cfg[i].scan_type); 766 UINT16_TO_STREAM(pp, phy_cfg[i].scan_int); 767 UINT16_TO_STREAM(pp, phy_cfg[i].scan_win); 768 } 769 770 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 771 } 772 773 void btsnd_hcic_ble_set_extended_scan_enable(uint8_t enable, 774 uint8_t filter_duplicates, 775 uint16_t duration, 776 uint16_t period) { 777 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 778 uint8_t* pp = (uint8_t*)(p + 1); 779 780 const int param_len = 6; 781 p->len = HCIC_PREAMBLE_SIZE + param_len; 782 p->offset = 0; 783 784 UINT16_TO_STREAM(pp, HCI_LE_SET_EXTENDED_SCAN_ENABLE); 785 UINT8_TO_STREAM(pp, param_len); 786 787 UINT8_TO_STREAM(pp, enable); 788 UINT8_TO_STREAM(pp, filter_duplicates); 789 UINT16_TO_STREAM(pp, duration); 790 UINT16_TO_STREAM(pp, period); 791 792 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 793 } 794 795 void btsnd_hcic_ble_ext_create_conn(uint8_t init_filter_policy, 796 uint8_t addr_type_own, 797 uint8_t addr_type_peer, 798 const RawAddress& bda_peer, 799 uint8_t initiating_phys, 800 EXT_CONN_PHY_CFG* phy_cfg) { 801 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE); 802 uint8_t* pp = (uint8_t*)(p + 1); 803 804 int phy_cnt = 805 std::bitset<std::numeric_limits<uint8_t>::digits>(initiating_phys) 806 .count(); 807 808 /* param_len = initial_params + size_per_channel * num_of_channels */ 809 uint8_t param_len = 10 + (16 * phy_cnt); 810 811 p->len = HCIC_PREAMBLE_SIZE + param_len; 812 p->offset = 0; 813 814 UINT16_TO_STREAM(pp, HCI_LE_EXTENDED_CREATE_CONNECTION); 815 UINT8_TO_STREAM(pp, param_len); 816 817 UINT8_TO_STREAM(pp, init_filter_policy); 818 UINT8_TO_STREAM(pp, addr_type_own); 819 UINT8_TO_STREAM(pp, addr_type_peer); 820 BDADDR_TO_STREAM(pp, bda_peer); 821 822 UINT8_TO_STREAM(pp, initiating_phys); 823 824 for (int i = 0; i < phy_cnt; i++) { 825 UINT16_TO_STREAM(pp, phy_cfg[i].scan_int); 826 UINT16_TO_STREAM(pp, phy_cfg[i].scan_win); 827 UINT16_TO_STREAM(pp, phy_cfg[i].conn_int_min); 828 UINT16_TO_STREAM(pp, phy_cfg[i].conn_int_max); 829 UINT16_TO_STREAM(pp, phy_cfg[i].conn_latency); 830 UINT16_TO_STREAM(pp, phy_cfg[i].sup_timeout); 831 UINT16_TO_STREAM(pp, phy_cfg[i].min_ce_len); 832 UINT16_TO_STREAM(pp, phy_cfg[i].max_ce_len); 833 } 834 835 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p); 836 } 837
