| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 220 Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0); local
226 EXPECT_TRUE(reg.Overlaps(dreg));
232 dreg = Arm64ManagedRegister::FromDRegister(D5);
238 EXPECT_TRUE(reg.Overlaps(dreg));
244 dreg = Arm64ManagedRegister::FromDRegister(D7);
250 EXPECT_TRUE(reg.Overlaps(dreg));
256 dreg = Arm64ManagedRegister::FromDRegister(D31);
262 EXPECT_TRUE(reg.Overlaps(dreg));
[all...] |
| /external/vixl/test/aarch64/ |
| test-utils-aarch64.h | 112 inline double dreg(unsigned code) const { function in class:vixl::aarch64::RegisterDump
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/ |
| am33-2.c | 89 dreg (func_arg *arg, insn_data *data) function
90 #define dreg(shiftlow, shifthigh) { dreg, { i1: shiftlow, i2: shifthigh } } macro
358 lparen, amreg (4), rparen, comma, dreg (0, 8), tick_random);
360 lparen, amreg (4), plus, rparen, comma, dreg (0, 8), tick_random);
362 lparen, spreg, rparen, comma, dreg (0, 8));
364 dreg (4, 9), comma, lparen, amreg (0), rparen, tick_random);
366 dreg (4, 9), comma, lparen, amreg (0), plus, rparen, tick_random);
368 dreg (4, 9), comma, lparen, spreg, rparen);
370 dreg (4, 9), comma, dreg (0, 8), tick_random)
[all...] |
| /external/v8/src/ppc/ |
| deoptimizer-ppc.cc | 130 const DoubleRegister dreg = DoubleRegister::from_code(code); local
132 __ stfd(dreg, MemOperand(sp, offset));
275 const DoubleRegister dreg = DoubleRegister::from_code(code); local
277 __ lfd(dreg, MemOperand(r4, src_offset));
|
| macro-assembler-ppc.cc | 245 DoubleRegister dreg = DoubleRegister::from_code(i); local
247 stfd(dreg, MemOperand(location, stack_offset));
258 DoubleRegister dreg = DoubleRegister::from_code(i); local
259 lfd(dreg, MemOperand(location, stack_offset));
[all...] |
| /external/v8/src/s390/ |
| deoptimizer-s390.cc | 122 const DoubleRegister dreg = DoubleRegister::from_code(code); local
124 __ StoreDouble(dreg, MemOperand(sp, offset));
273 const DoubleRegister dreg = DoubleRegister::from_code(code); local
275 __ ld(dreg, MemOperand(r3, src_offset));
|
| macro-assembler-s390.cc | 220 DoubleRegister dreg = DoubleRegister::from_code(i); local
222 StoreDouble(dreg, MemOperand(location, stack_offset));
232 DoubleRegister dreg = DoubleRegister::from_code(i); local
233 LoadDouble(dreg, MemOperand(location, stack_offset));
[all...] |
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_lowering_nvc0.cpp | 1461 Value *dreg = bld.getSSA(8); local
[all...] |
| /external/valgrind/VEX/priv/ |
| host_arm_isel.c | 3902 HReg dreg = iselNeon64Expr(env, triop->arg1); local
[all...] |
| guest_arm_toIR.c | 701 /* Plain ("low level") read from a VFP Dreg. */
708 /* Architected read from a VFP Dreg. */
713 /* Plain ("low level") write to a VFP Dreg. */
721 /* Architected write to a VFP Dreg. Handles conditional writes to the
744 /* Plain ("low level") read from a Neon Integer Dreg. */
751 /* Architected read from a Neon Integer Dreg. */
756 /* Plain ("low level") write to a Neon Integer Dreg. */
764 /* Architected write to a Neon Integer Dreg. Handles conditional
2886 UInt dreg = get_neon_d_regno(theInstr); local
2935 UInt dreg = get_neon_d_regno(theInstr & ~(1 << 6)); local
3015 UInt dreg = ((theInstr >> 18) & 0x10) | ((theInstr >> 12) & 0xF); local
3075 UInt dreg = get_neon_d_regno(theInstr); local
4889 UInt dreg = get_neon_d_regno(theInstr); local
5306 UInt dreg = get_neon_d_regno(theInstr & ~(1 << 6)); local
5972 UInt dreg = get_neon_d_regno(theInstr); local
6687 UInt dreg = get_neon_d_regno(theInstr); local
7707 UInt dreg = get_neon_d_regno(theInstr); local
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_shader.c | 1003 int dreg = d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ? 3 : 2; local
1017 do_lds_fetch_values(ctx, temp_reg, dreg);
2761 int dreg = ctx->shader->output[output_idx].gpr; local
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.cc | 4007 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4020 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4041 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4054 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4077 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4090 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4111 const DRegister& dreg = dreglist.GetFirstDRegister(); local
4124 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18214 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18226 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18280 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18291 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18343 const DRegister& dreg = dreglist.GetFirstDRegister(); local
18355 const DRegister& dreg = dreglist.GetFirstDRegister(); local
21152 const DRegister& dreg = dreglist.GetFirstDRegister(); local
21162 const DRegister& dreg = dreglist.GetFirstDRegister(); local
21203 const DRegister& dreg = dreglist.GetFirstDRegister(); local
21213 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25733 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25745 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25799 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25810 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25862 const DRegister& dreg = dreglist.GetFirstDRegister(); local
25874 const DRegister& dreg = dreglist.GetFirstDRegister(); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-mips.c | 10744 unsigned int dreg; local
10885 unsigned int dreg; local
11023 unsigned int dreg; local
[all...] |
