1 /* tc-arc.c -- Assembler for the ARC 2 Copyright (C) 1994-2014 Free Software Foundation, Inc. 3 Contributed by Doug Evans (dje (at) cygnus.com). 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "struc-symbol.h" 24 #include "safe-ctype.h" 25 #include "subsegs.h" 26 #include "opcode/arc.h" 27 #include "../opcodes/arc-ext.h" 28 #include "elf/arc.h" 29 #include "dwarf2dbg.h" 30 31 const struct suffix_classes 32 { 33 char *name; 34 int len; 35 } suffixclass[] = 36 { 37 { "SUFFIX_COND|SUFFIX_FLAG",23 }, 38 { "SUFFIX_FLAG", 11 }, 39 { "SUFFIX_COND", 11 }, 40 { "SUFFIX_NONE", 11 } 41 }; 42 43 #define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes)) 44 45 const struct syntax_classes 46 { 47 char *name; 48 int len; 49 int s_class; 50 } syntaxclass[] = 51 { 52 { "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP|OP1_MUST_BE_IMM|SYNTAX_VALID }, 53 { "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM|SYNTAX_3OP|SYNTAX_VALID }, 54 { "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP|OP1_IMM_IMPLIED|SYNTAX_VALID }, 55 { "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED|SYNTAX_2OP|SYNTAX_VALID }, 56 { "SYNTAX_3OP", 10, SYNTAX_3OP|SYNTAX_VALID }, 57 { "SYNTAX_2OP", 10, SYNTAX_2OP|SYNTAX_VALID } 58 }; 59 60 #define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes)) 61 62 /* This array holds the chars that always start a comment. If the 63 pre-processor is disabled, these aren't very useful. */ 64 const char comment_chars[] = "#;"; 65 66 /* This array holds the chars that only start a comment at the beginning of 67 a line. If the line seems to have the form '# 123 filename' 68 .line and .file directives will appear in the pre-processed output */ 69 /* Note that input_file.c hand checks for '#' at the beginning of the 70 first line of the input file. This is because the compiler outputs 71 #NO_APP at the beginning of its output. */ 72 /* Also note that comments started like this one will always 73 work if '/' isn't otherwise defined. */ 74 const char line_comment_chars[] = "#"; 75 76 const char line_separator_chars[] = ""; 77 78 /* Chars that can be used to separate mant from exp in floating point nums. */ 79 const char EXP_CHARS[] = "eE"; 80 81 /* Chars that mean this number is a floating point constant 82 As in 0f12.456 or 0d1.2345e12. */ 83 const char FLT_CHARS[] = "rRsSfFdD"; 84 85 /* Byte order. */ 86 extern int target_big_endian; 87 const char *arc_target_format = DEFAULT_TARGET_FORMAT; 88 static int byte_order = DEFAULT_BYTE_ORDER; 89 90 static segT arcext_section; 91 92 /* One of bfd_mach_arc_n. */ 93 static int arc_mach_type = bfd_mach_arc_6; 94 95 /* Non-zero if the cpu type has been explicitly specified. */ 96 static int mach_type_specified_p = 0; 97 98 /* Non-zero if opcode tables have been initialized. 99 A .option command must appear before any instructions. */ 100 static int cpu_tables_init_p = 0; 101 102 static struct hash_control *arc_suffix_hash = NULL; 103 104 const char *md_shortopts = ""; 106 107 enum options 108 { 109 OPTION_EB = OPTION_MD_BASE, 110 OPTION_EL, 111 OPTION_ARC5, 112 OPTION_ARC6, 113 OPTION_ARC7, 114 OPTION_ARC8, 115 OPTION_ARC 116 }; 117 118 struct option md_longopts[] = 119 { 120 { "EB", no_argument, NULL, OPTION_EB }, 121 { "EL", no_argument, NULL, OPTION_EL }, 122 { "marc5", no_argument, NULL, OPTION_ARC5 }, 123 { "pre-v6", no_argument, NULL, OPTION_ARC5 }, 124 { "marc6", no_argument, NULL, OPTION_ARC6 }, 125 { "marc7", no_argument, NULL, OPTION_ARC7 }, 126 { "marc8", no_argument, NULL, OPTION_ARC8 }, 127 { "marc", no_argument, NULL, OPTION_ARC }, 128 { NULL, no_argument, NULL, 0 } 129 }; 130 size_t md_longopts_size = sizeof (md_longopts); 131 132 #define IS_SYMBOL_OPERAND(o) \ 133 ((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O') 134 135 struct arc_operand_value *get_ext_suffix (char *s); 136 137 /* Invocation line includes a switch not recognized by the base assembler. 138 See if it's a processor-specific option. */ 139 140 int 141 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) 142 { 143 switch (c) 144 { 145 case OPTION_ARC5: 146 arc_mach_type = bfd_mach_arc_5; 147 break; 148 case OPTION_ARC: 149 case OPTION_ARC6: 150 arc_mach_type = bfd_mach_arc_6; 151 break; 152 case OPTION_ARC7: 153 arc_mach_type = bfd_mach_arc_7; 154 break; 155 case OPTION_ARC8: 156 arc_mach_type = bfd_mach_arc_8; 157 break; 158 case OPTION_EB: 159 byte_order = BIG_ENDIAN; 160 arc_target_format = "elf32-bigarc"; 161 break; 162 case OPTION_EL: 163 byte_order = LITTLE_ENDIAN; 164 arc_target_format = "elf32-littlearc"; 165 break; 166 default: 167 return 0; 168 } 169 return 1; 170 } 171 172 void 173 md_show_usage (FILE *stream) 174 { 175 fprintf (stream, "\ 176 ARC Options:\n\ 177 -marc[5|6|7|8] select processor variant (default arc%d)\n\ 178 -EB assemble code for a big endian cpu\n\ 179 -EL assemble code for a little endian cpu\n", arc_mach_type + 5); 180 } 181 182 /* This function is called once, at assembler startup time. It should 183 set up all the tables, etc. that the MD part of the assembler will need. 184 Opcode selection is deferred until later because we might see a .option 185 command. */ 186 187 void 188 md_begin (void) 189 { 190 /* The endianness can be chosen "at the factory". */ 191 target_big_endian = byte_order == BIG_ENDIAN; 192 193 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type)) 194 as_warn (_("could not set architecture and machine")); 195 196 /* This call is necessary because we need to initialize `arc_operand_map' 197 which may be needed before we see the first insn. */ 198 arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type, 199 target_big_endian)); 200 } 201 202 /* Initialize the various opcode and operand tables. 203 MACH is one of bfd_mach_arc_xxx. */ 204 205 static void 206 init_opcode_tables (int mach) 207 { 208 int i; 209 char *last; 210 211 if ((arc_suffix_hash = hash_new ()) == NULL) 212 as_fatal (_("virtual memory exhausted")); 213 214 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) 215 as_warn (_("could not set architecture and machine")); 216 217 /* This initializes a few things in arc-opc.c that we need. 218 This must be called before the various arc_xxx_supported fns. */ 219 arc_opcode_init_tables (arc_get_opcode_mach (mach, target_big_endian)); 220 221 /* Only put the first entry of each equivalently named suffix in the 222 table. */ 223 last = ""; 224 for (i = 0; i < arc_suffixes_count; i++) 225 { 226 if (strcmp (arc_suffixes[i].name, last) != 0) 227 hash_insert (arc_suffix_hash, arc_suffixes[i].name, (void *) (arc_suffixes + i)); 228 last = arc_suffixes[i].name; 229 } 230 231 /* Since registers don't have a prefix, we put them in the symbol table so 232 they can't be used as symbols. This also simplifies argument parsing as 233 we can let gas parse registers for us. The recorded register number is 234 the address of the register's entry in arc_reg_names. 235 236 If the register name is already in the table, then the existing 237 definition is assumed to be from an .ExtCoreRegister pseudo-op. */ 238 239 for (i = 0; i < arc_reg_names_count; i++) 240 { 241 if (symbol_find (arc_reg_names[i].name)) 242 continue; 243 /* Use symbol_create here instead of symbol_new so we don't try to 244 output registers into the object file's symbol table. */ 245 symbol_table_insert (symbol_create (arc_reg_names[i].name, 246 reg_section, 247 (valueT) &arc_reg_names[i], 248 &zero_address_frag)); 249 } 250 251 /* Tell `.option' it's too late. */ 252 cpu_tables_init_p = 1; 253 } 254 255 /* Insert an operand value into an instruction. 257 If REG is non-NULL, it is a register number and ignore VAL. */ 258 259 static arc_insn 260 arc_insert_operand (arc_insn insn, 261 const struct arc_operand *operand, 262 int mods, 263 const struct arc_operand_value *reg, 264 offsetT val, 265 char *file, 266 unsigned int line) 267 { 268 if (operand->bits != 32) 269 { 270 long min, max; 271 offsetT test; 272 273 if ((operand->flags & ARC_OPERAND_SIGNED) != 0) 274 { 275 if ((operand->flags & ARC_OPERAND_SIGNOPT) != 0) 276 max = (1 << operand->bits) - 1; 277 else 278 max = (1 << (operand->bits - 1)) - 1; 279 min = - (1 << (operand->bits - 1)); 280 } 281 else 282 { 283 max = (1 << operand->bits) - 1; 284 min = 0; 285 } 286 287 if ((operand->flags & ARC_OPERAND_NEGATIVE) != 0) 288 test = - val; 289 else 290 test = val; 291 292 if (test < (offsetT) min || test > (offsetT) max) 293 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line); 294 } 295 296 if (operand->insert) 297 { 298 const char *errmsg; 299 300 errmsg = NULL; 301 insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg); 302 if (errmsg != (const char *) NULL) 303 as_warn ("%s", errmsg); 304 } 305 else 306 insn |= (((long) val & ((1 << operand->bits) - 1)) 307 << operand->shift); 308 309 return insn; 310 } 311 312 /* We need to keep a list of fixups. We can't simply generate them as 313 we go, because that would require us to first create the frag, and 314 that would screw up references to ``.''. */ 315 316 struct arc_fixup 317 { 318 /* index into `arc_operands' */ 319 int opindex; 320 expressionS exp; 321 }; 322 323 #define MAX_FIXUPS 5 324 325 #define MAX_SUFFIXES 5 326 327 /* Compute the reloc type of an expression. 328 The possibly modified expression is stored in EXPNEW. 329 330 This is used to convert the expressions generated by the %-op's into 331 the appropriate operand type. It is called for both data in instructions 332 (operands) and data outside instructions (variables, debugging info, etc.). 333 334 Currently supported %-ops: 335 336 %st(symbol): represented as "symbol >> 2" 337 "st" is short for STatus as in the status register (pc) 338 339 DEFAULT_TYPE is the type to use if no special processing is required. 340 341 DATA_P is non-zero for data or limm values, zero for insn operands. 342 Remember that the opcode "insertion fns" cannot be used on data, they're 343 only for inserting operands into insns. They also can't be used for limm 344 values as the insertion routines don't handle limm values. When called for 345 insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When 346 called for data or limm values we use real reloc types. */ 347 348 static int 349 get_arc_exp_reloc_type (int data_p, 350 int default_type, 351 expressionS *exp, 352 expressionS *expnew) 353 { 354 /* If the expression is "symbol >> 2" we must change it to just "symbol", 355 as fix_new_exp can't handle it. Similarly for (symbol - symbol) >> 2. 356 That's ok though. What's really going on here is that we're using 357 ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */ 358 359 if (exp->X_op == O_right_shift 360 && exp->X_op_symbol != NULL 361 && exp->X_op_symbol->sy_value.X_op == O_constant 362 && exp->X_op_symbol->sy_value.X_add_number == 2 363 && exp->X_add_number == 0) 364 { 365 if (exp->X_add_symbol != NULL 366 && (exp->X_add_symbol->sy_value.X_op == O_constant 367 || exp->X_add_symbol->sy_value.X_op == O_symbol)) 368 { 369 *expnew = *exp; 370 expnew->X_op = O_symbol; 371 expnew->X_op_symbol = NULL; 372 return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; 373 } 374 else if (exp->X_add_symbol != NULL 375 && exp->X_add_symbol->sy_value.X_op == O_subtract) 376 { 377 *expnew = exp->X_add_symbol->sy_value; 378 return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; 379 } 380 } 381 382 *expnew = *exp; 383 return default_type; 384 } 385 386 static int 388 arc_set_ext_seg (void) 389 { 390 if (!arcext_section) 391 { 392 arcext_section = subseg_new (".arcextmap", 0); 393 bfd_set_section_flags (stdoutput, arcext_section, 394 SEC_READONLY | SEC_HAS_CONTENTS); 395 } 396 else 397 subseg_set (arcext_section, 0); 398 return 1; 399 } 400 401 static void 402 arc_extoper (int opertype) 403 { 404 char *name; 405 char *mode; 406 char c; 407 char *p; 408 int imode = 0; 409 int number; 410 struct arc_ext_operand_value *ext_oper; 411 symbolS *symbolP; 412 413 segT old_sec; 414 int old_subsec; 415 416 name = input_line_pointer; 417 c = get_symbol_end (); 418 name = xstrdup (name); 419 420 p = name; 421 while (*p) 422 { 423 *p = TOLOWER (*p); 424 p++; 425 } 426 427 /* just after name is now '\0' */ 428 p = input_line_pointer; 429 *p = c; 430 SKIP_WHITESPACE (); 431 432 if (*input_line_pointer != ',') 433 { 434 as_bad (_("expected comma after operand name")); 435 ignore_rest_of_line (); 436 free (name); 437 return; 438 } 439 440 input_line_pointer++; /* skip ',' */ 441 number = get_absolute_expression (); 442 443 if (number < 0) 444 { 445 as_bad (_("negative operand number %d"), number); 446 ignore_rest_of_line (); 447 free (name); 448 return; 449 } 450 451 if (opertype) 452 { 453 SKIP_WHITESPACE (); 454 455 if (*input_line_pointer != ',') 456 { 457 as_bad (_("expected comma after register-number")); 458 ignore_rest_of_line (); 459 free (name); 460 return; 461 } 462 463 input_line_pointer++; /* skip ',' */ 464 mode = input_line_pointer; 465 466 if (!strncmp (mode, "r|w", 3)) 467 { 468 imode = 0; 469 input_line_pointer += 3; 470 } 471 else 472 { 473 if (!strncmp (mode, "r", 1)) 474 { 475 imode = ARC_REGISTER_READONLY; 476 input_line_pointer += 1; 477 } 478 else 479 { 480 if (strncmp (mode, "w", 1)) 481 { 482 as_bad (_("invalid mode")); 483 ignore_rest_of_line (); 484 free (name); 485 return; 486 } 487 else 488 { 489 imode = ARC_REGISTER_WRITEONLY; 490 input_line_pointer += 1; 491 } 492 } 493 } 494 SKIP_WHITESPACE (); 495 if (1 == opertype) 496 { 497 if (*input_line_pointer != ',') 498 { 499 as_bad (_("expected comma after register-mode")); 500 ignore_rest_of_line (); 501 free (name); 502 return; 503 } 504 505 input_line_pointer++; /* skip ',' */ 506 507 if (!strncmp (input_line_pointer, "cannot_shortcut", 15)) 508 { 509 imode |= arc_get_noshortcut_flag (); 510 input_line_pointer += 15; 511 } 512 else 513 { 514 if (strncmp (input_line_pointer, "can_shortcut", 12)) 515 { 516 as_bad (_("shortcut designator invalid")); 517 ignore_rest_of_line (); 518 free (name); 519 return; 520 } 521 else 522 { 523 input_line_pointer += 12; 524 } 525 } 526 } 527 } 528 529 if ((opertype == 1) && number > 60) 530 { 531 as_bad (_("core register value (%d) too large"), number); 532 ignore_rest_of_line (); 533 free (name); 534 return; 535 } 536 537 if ((opertype == 0) && number > 31) 538 { 539 as_bad (_("condition code value (%d) too large"), number); 540 ignore_rest_of_line (); 541 free (name); 542 return; 543 } 544 545 ext_oper = (struct arc_ext_operand_value *) 546 xmalloc (sizeof (struct arc_ext_operand_value)); 547 548 if (opertype) 549 { 550 /* If the symbol already exists, point it at the new definition. */ 551 if ((symbolP = symbol_find (name))) 552 { 553 if (S_GET_SEGMENT (symbolP) == reg_section) 554 S_SET_VALUE (symbolP, (valueT) &ext_oper->operand); 555 else 556 { 557 as_bad (_("attempt to override symbol: %s"), name); 558 ignore_rest_of_line (); 559 free (name); 560 free (ext_oper); 561 return; 562 } 563 } 564 else 565 { 566 /* If its not there, add it. */ 567 symbol_table_insert (symbol_create (name, reg_section, 568 (valueT) &ext_oper->operand, 569 &zero_address_frag)); 570 } 571 } 572 573 ext_oper->operand.name = name; 574 ext_oper->operand.value = number; 575 ext_oper->operand.type = arc_operand_type (opertype); 576 ext_oper->operand.flags = imode; 577 578 ext_oper->next = arc_ext_operands; 579 arc_ext_operands = ext_oper; 580 581 /* OK, now that we know what this operand is, put a description in 582 the arc extension section of the output file. */ 583 584 old_sec = now_seg; 585 old_subsec = now_subseg; 586 587 arc_set_ext_seg (); 588 589 switch (opertype) 590 { 591 case 0: 592 p = frag_more (1); 593 *p = 3 + strlen (name) + 1; 594 p = frag_more (1); 595 *p = EXT_COND_CODE; 596 p = frag_more (1); 597 *p = number; 598 p = frag_more (strlen (name) + 1); 599 strcpy (p, name); 600 break; 601 case 1: 602 p = frag_more (1); 603 *p = 3 + strlen (name) + 1; 604 p = frag_more (1); 605 *p = EXT_CORE_REGISTER; 606 p = frag_more (1); 607 *p = number; 608 p = frag_more (strlen (name) + 1); 609 strcpy (p, name); 610 break; 611 case 2: 612 p = frag_more (1); 613 *p = 6 + strlen (name) + 1; 614 p = frag_more (1); 615 *p = EXT_AUX_REGISTER; 616 p = frag_more (1); 617 *p = number >> 24 & 0xff; 618 p = frag_more (1); 619 *p = number >> 16 & 0xff; 620 p = frag_more (1); 621 *p = number >> 8 & 0xff; 622 p = frag_more (1); 623 *p = number & 0xff; 624 p = frag_more (strlen (name) + 1); 625 strcpy (p, name); 626 break; 627 default: 628 as_bad (_("invalid opertype")); 629 ignore_rest_of_line (); 630 free (name); 631 return; 632 break; 633 } 634 635 subseg_set (old_sec, old_subsec); 636 637 /* Enter all registers into the symbol table. */ 638 639 demand_empty_rest_of_line (); 640 } 641 642 static void 643 arc_extinst (int ignore ATTRIBUTE_UNUSED) 644 { 645 char syntax[129]; 646 char *name; 647 char *p; 648 char c; 649 int suffixcode = -1; 650 int opcode, subopcode; 651 int i; 652 int s_class = 0; 653 int name_len; 654 struct arc_opcode *ext_op; 655 656 segT old_sec; 657 int old_subsec; 658 659 name = input_line_pointer; 660 c = get_symbol_end (); 661 name = xstrdup (name); 662 strcpy (syntax, name); 663 name_len = strlen (name); 664 665 /* just after name is now '\0' */ 666 p = input_line_pointer; 667 *p = c; 668 669 SKIP_WHITESPACE (); 670 671 if (*input_line_pointer != ',') 672 { 673 as_bad (_("expected comma after operand name")); 674 ignore_rest_of_line (); 675 return; 676 } 677 678 input_line_pointer++; /* skip ',' */ 679 opcode = get_absolute_expression (); 680 681 SKIP_WHITESPACE (); 682 683 if (*input_line_pointer != ',') 684 { 685 as_bad (_("expected comma after opcode")); 686 ignore_rest_of_line (); 687 return; 688 } 689 690 input_line_pointer++; /* skip ',' */ 691 subopcode = get_absolute_expression (); 692 693 if (subopcode < 0) 694 { 695 as_bad (_("negative subopcode %d"), subopcode); 696 ignore_rest_of_line (); 697 return; 698 } 699 700 if (subopcode) 701 { 702 if (3 != opcode) 703 { 704 as_bad (_("subcode value found when opcode not equal 0x03")); 705 ignore_rest_of_line (); 706 return; 707 } 708 else 709 { 710 if (subopcode < 0x09 || subopcode == 0x3f) 711 { 712 as_bad (_("invalid subopcode %d"), subopcode); 713 ignore_rest_of_line (); 714 return; 715 } 716 } 717 } 718 719 SKIP_WHITESPACE (); 720 721 if (*input_line_pointer != ',') 722 { 723 as_bad (_("expected comma after subopcode")); 724 ignore_rest_of_line (); 725 return; 726 } 727 728 input_line_pointer++; /* skip ',' */ 729 730 for (i = 0; i < (int) MAXSUFFIXCLASS; i++) 731 { 732 if (!strncmp (suffixclass[i].name,input_line_pointer, suffixclass[i].len)) 733 { 734 suffixcode = i; 735 input_line_pointer += suffixclass[i].len; 736 break; 737 } 738 } 739 740 if (-1 == suffixcode) 741 { 742 as_bad (_("invalid suffix class")); 743 ignore_rest_of_line (); 744 return; 745 } 746 747 SKIP_WHITESPACE (); 748 749 if (*input_line_pointer != ',') 750 { 751 as_bad (_("expected comma after suffix class")); 752 ignore_rest_of_line (); 753 return; 754 } 755 756 input_line_pointer++; /* skip ',' */ 757 758 for (i = 0; i < (int) MAXSYNTAXCLASS; i++) 759 { 760 if (!strncmp (syntaxclass[i].name,input_line_pointer, syntaxclass[i].len)) 761 { 762 s_class = syntaxclass[i].s_class; 763 input_line_pointer += syntaxclass[i].len; 764 break; 765 } 766 } 767 768 if (0 == (SYNTAX_VALID & s_class)) 769 { 770 as_bad (_("invalid syntax class")); 771 ignore_rest_of_line (); 772 return; 773 } 774 775 if ((0x3 == opcode) & (s_class & SYNTAX_3OP)) 776 { 777 as_bad (_("opcode 0x3 and SYNTAX_3OP invalid")); 778 ignore_rest_of_line (); 779 return; 780 } 781 782 switch (suffixcode) 783 { 784 case 0: 785 strcat (syntax, "%.q%.f "); 786 break; 787 case 1: 788 strcat (syntax, "%.f "); 789 break; 790 case 2: 791 strcat (syntax, "%.q "); 792 break; 793 case 3: 794 strcat (syntax, " "); 795 break; 796 default: 797 as_bad (_("unknown suffix class")); 798 ignore_rest_of_line (); 799 return; 800 break; 801 }; 802 803 strcat (syntax, ((opcode == 0x3) ? "%a,%b" : ((s_class & SYNTAX_3OP) ? "%a,%b,%c" : "%b,%c"))); 804 if (suffixcode < 2) 805 strcat (syntax, "%F"); 806 strcat (syntax, "%S%L"); 807 808 ext_op = (struct arc_opcode *) xmalloc (sizeof (struct arc_opcode)); 809 ext_op->syntax = xstrdup (syntax); 810 811 ext_op->mask = I (-1) | ((0x3 == opcode) ? C (-1) : 0); 812 ext_op->value = I (opcode) | ((0x3 == opcode) ? C (subopcode) : 0); 813 ext_op->flags = s_class; 814 ext_op->next_asm = arc_ext_opcodes; 815 ext_op->next_dis = arc_ext_opcodes; 816 arc_ext_opcodes = ext_op; 817 818 /* OK, now that we know what this inst is, put a description in the 819 arc extension section of the output file. */ 820 821 old_sec = now_seg; 822 old_subsec = now_subseg; 823 824 arc_set_ext_seg (); 825 826 p = frag_more (1); 827 *p = 5 + name_len + 1; 828 p = frag_more (1); 829 *p = EXT_INSTRUCTION; 830 p = frag_more (1); 831 *p = opcode; 832 p = frag_more (1); 833 *p = subopcode; 834 p = frag_more (1); 835 *p = (s_class & (OP1_MUST_BE_IMM | OP1_IMM_IMPLIED) ? IGNORE_FIRST_OPD : 0); 836 p = frag_more (name_len); 837 strncpy (p, syntax, name_len); 838 p = frag_more (1); 839 *p = '\0'; 840 841 subseg_set (old_sec, old_subsec); 842 843 demand_empty_rest_of_line (); 844 } 845 846 static void 847 arc_common (int localScope) 848 { 849 char *name; 850 char c; 851 char *p; 852 int align, size; 853 symbolS *symbolP; 854 855 name = input_line_pointer; 856 c = get_symbol_end (); 857 /* just after name is now '\0' */ 858 p = input_line_pointer; 859 *p = c; 860 SKIP_WHITESPACE (); 861 862 if (*input_line_pointer != ',') 863 { 864 as_bad (_("expected comma after symbol name")); 865 ignore_rest_of_line (); 866 return; 867 } 868 869 input_line_pointer++; /* skip ',' */ 870 size = get_absolute_expression (); 871 872 if (size < 0) 873 { 874 as_bad (_("negative symbol length")); 875 ignore_rest_of_line (); 876 return; 877 } 878 879 *p = 0; 880 symbolP = symbol_find_or_make (name); 881 *p = c; 882 883 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 884 { 885 as_bad (_("ignoring attempt to re-define symbol")); 886 ignore_rest_of_line (); 887 return; 888 } 889 if (((int) S_GET_VALUE (symbolP) != 0) \ 890 && ((int) S_GET_VALUE (symbolP) != size)) 891 { 892 as_warn (_("length of symbol \"%s\" already %ld, ignoring %d"), 893 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); 894 } 895 gas_assert (symbolP->sy_frag == &zero_address_frag); 896 897 /* Now parse the alignment field. This field is optional for 898 local and global symbols. Default alignment is zero. */ 899 if (*input_line_pointer == ',') 900 { 901 input_line_pointer++; 902 align = get_absolute_expression (); 903 if (align < 0) 904 { 905 align = 0; 906 as_warn (_("assuming symbol alignment of zero")); 907 } 908 } 909 else 910 align = 0; 911 912 if (localScope != 0) 913 { 914 segT old_sec; 915 int old_subsec; 916 char *pfrag; 917 918 old_sec = now_seg; 919 old_subsec = now_subseg; 920 record_alignment (bss_section, align); 921 subseg_set (bss_section, 0); /* ??? subseg_set (bss_section, 1); ??? */ 922 923 if (align) 924 /* Do alignment. */ 925 frag_align (align, 0, 0); 926 927 /* Detach from old frag. */ 928 if (S_GET_SEGMENT (symbolP) == bss_section) 929 symbolP->sy_frag->fr_symbol = NULL; 930 931 symbolP->sy_frag = frag_now; 932 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, 933 (offsetT) size, (char *) 0); 934 *pfrag = 0; 935 936 S_SET_SIZE (symbolP, size); 937 S_SET_SEGMENT (symbolP, bss_section); 938 S_CLEAR_EXTERNAL (symbolP); 939 symbol_get_obj (symbolP)->local = 1; 940 subseg_set (old_sec, old_subsec); 941 } 942 else 943 { 944 S_SET_VALUE (symbolP, (valueT) size); 945 S_SET_ALIGN (symbolP, align); 946 S_SET_EXTERNAL (symbolP); 947 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 948 } 949 950 symbolP->bsym->flags |= BSF_OBJECT; 951 952 demand_empty_rest_of_line (); 953 } 954 955 /* Select the cpu we're assembling for. */ 957 958 static void 959 arc_option (int ignore ATTRIBUTE_UNUSED) 960 { 961 extern int arc_get_mach (char *); 962 int mach; 963 char c; 964 char *cpu; 965 966 cpu = input_line_pointer; 967 c = get_symbol_end (); 968 mach = arc_get_mach (cpu); 969 *input_line_pointer = c; 970 971 /* If an instruction has already been seen, it's too late. */ 972 if (cpu_tables_init_p) 973 { 974 as_bad (_("\".option\" directive must appear before any instructions")); 975 ignore_rest_of_line (); 976 return; 977 } 978 979 if (mach == -1) 980 goto bad_cpu; 981 982 if (mach_type_specified_p && mach != arc_mach_type) 983 { 984 as_bad (_("\".option\" directive conflicts with initial definition")); 985 ignore_rest_of_line (); 986 return; 987 } 988 else 989 { 990 /* The cpu may have been selected on the command line. */ 991 if (mach != arc_mach_type) 992 as_warn (_("\".option\" directive overrides command-line (default) value")); 993 arc_mach_type = mach; 994 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) 995 as_fatal (_("could not set architecture and machine")); 996 mach_type_specified_p = 1; 997 } 998 demand_empty_rest_of_line (); 999 return; 1000 1001 bad_cpu: 1002 as_bad (_("invalid identifier for \".option\"")); 1003 ignore_rest_of_line (); 1004 } 1005 1006 char * 1008 md_atof (int type, char *litP, int *sizeP) 1009 { 1010 return ieee_md_atof (type, litP, sizeP, TRUE); 1011 } 1012 1013 /* Write a value out to the object file, using the appropriate 1014 endianness. */ 1015 1016 void 1017 md_number_to_chars (char *buf, valueT val, int n) 1018 { 1019 if (target_big_endian) 1020 number_to_chars_bigendian (buf, val, n); 1021 else 1022 number_to_chars_littleendian (buf, val, n); 1023 } 1024 1025 /* Round up a section size to the appropriate boundary. */ 1026 1027 valueT 1028 md_section_align (segT segment, valueT size) 1029 { 1030 int align = bfd_get_section_alignment (stdoutput, segment); 1031 1032 return ((size + (1 << align) - 1) & (-1 << align)); 1033 } 1034 1035 /* We don't have any form of relaxing. */ 1036 1037 int 1038 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 1039 asection *seg ATTRIBUTE_UNUSED) 1040 { 1041 as_fatal (_("relaxation not supported\n")); 1042 return 1; 1043 } 1044 1045 /* Convert a machine dependent frag. We never generate these. */ 1046 1047 void 1048 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 1049 asection *sec ATTRIBUTE_UNUSED, 1050 fragS *fragp ATTRIBUTE_UNUSED) 1051 { 1052 abort (); 1053 } 1054 1055 static void 1056 arc_code_symbol (expressionS *expressionP) 1057 { 1058 if (expressionP->X_op == O_symbol && expressionP->X_add_number == 0) 1059 { 1060 expressionS two; 1061 1062 expressionP->X_op = O_right_shift; 1063 expressionP->X_add_symbol->sy_value.X_op = O_constant; 1064 two.X_op = O_constant; 1065 two.X_add_symbol = two.X_op_symbol = NULL; 1066 two.X_add_number = 2; 1067 expressionP->X_op_symbol = make_expr_symbol (&two); 1068 } 1069 /* Allow %st(sym1-sym2) */ 1070 else if (expressionP->X_op == O_subtract 1071 && expressionP->X_add_symbol != NULL 1072 && expressionP->X_op_symbol != NULL 1073 && expressionP->X_add_number == 0) 1074 { 1075 expressionS two; 1076 1077 expressionP->X_add_symbol = make_expr_symbol (expressionP); 1078 expressionP->X_op = O_right_shift; 1079 two.X_op = O_constant; 1080 two.X_add_symbol = two.X_op_symbol = NULL; 1081 two.X_add_number = 2; 1082 expressionP->X_op_symbol = make_expr_symbol (&two); 1083 } 1084 else 1085 as_bad (_("expression too complex code symbol")); 1086 } 1087 1088 /* Parse an operand that is machine-specific. 1089 1090 The ARC has a special %-op to adjust addresses so they're usable in 1091 branches. The "st" is short for the STatus register. 1092 ??? Later expand this to take a flags value too. 1093 1094 ??? We can't create new expression types so we map the %-op's onto the 1095 existing syntax. This means that the user could use the chosen syntax 1096 to achieve the same effect. */ 1097 1098 void 1099 md_operand (expressionS *expressionP) 1100 { 1101 char *p = input_line_pointer; 1102 1103 if (*p != '%') 1104 return; 1105 1106 if (strncmp (p, "%st(", 4) == 0) 1107 { 1108 input_line_pointer += 4; 1109 expression (expressionP); 1110 if (*input_line_pointer != ')') 1111 { 1112 as_bad (_("missing ')' in %%-op")); 1113 return; 1114 } 1115 ++input_line_pointer; 1116 arc_code_symbol (expressionP); 1117 } 1118 else 1119 { 1120 /* It could be a register. */ 1121 int i, l; 1122 struct arc_ext_operand_value *ext_oper = arc_ext_operands; 1123 p++; 1124 1125 while (ext_oper) 1126 { 1127 l = strlen (ext_oper->operand.name); 1128 if (!strncmp (p, ext_oper->operand.name, l) && !ISALNUM (*(p + l))) 1129 { 1130 input_line_pointer += l + 1; 1131 expressionP->X_op = O_register; 1132 expressionP->X_add_number = (offsetT) &ext_oper->operand; 1133 return; 1134 } 1135 ext_oper = ext_oper->next; 1136 } 1137 for (i = 0; i < arc_reg_names_count; i++) 1138 { 1139 l = strlen (arc_reg_names[i].name); 1140 if (!strncmp (p, arc_reg_names[i].name, l) && !ISALNUM (*(p + l))) 1141 { 1142 input_line_pointer += l + 1; 1143 expressionP->X_op = O_register; 1144 expressionP->X_add_number = (offsetT) &arc_reg_names[i]; 1145 break; 1146 } 1147 } 1148 } 1149 } 1150 1151 /* We have no need to default values of symbols. 1152 We could catch register names here, but that is handled by inserting 1153 them all in the symbol table to begin with. */ 1154 1155 symbolS * 1156 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1157 { 1158 return 0; 1159 } 1160 1161 /* Functions concerning expressions. */ 1163 1164 /* Parse a .byte, .word, etc. expression. 1165 1166 Values for the status register are specified with %st(label). 1167 `label' will be right shifted by 2. */ 1168 1169 bfd_reloc_code_real_type 1170 arc_parse_cons_expression (expressionS *exp, 1171 unsigned int nbytes ATTRIBUTE_UNUSED) 1172 { 1173 char *p = input_line_pointer; 1174 int code_symbol_fix = 0; 1175 1176 for (; ! is_end_of_line[(unsigned char) *p]; p++) 1177 if (*p == '@' && !strncmp (p, "@h30", 4)) 1178 { 1179 code_symbol_fix = 1; 1180 strcpy (p, "; "); 1181 } 1182 expression_and_evaluate (exp); 1183 if (code_symbol_fix) 1184 { 1185 arc_code_symbol (exp); 1186 input_line_pointer = p; 1187 } 1188 return BFD_RELOC_NONE; 1189 } 1190 1191 /* Record a fixup for a cons expression. */ 1192 1193 void 1194 arc_cons_fix_new (fragS *frag, 1195 int where, 1196 int nbytes, 1197 expressionS *exp, 1198 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED) 1199 { 1200 if (nbytes == 4) 1201 { 1202 int reloc_type; 1203 expressionS exptmp; 1204 1205 /* This may be a special ARC reloc (eg: %st()). */ 1206 reloc_type = get_arc_exp_reloc_type (1, BFD_RELOC_32, exp, &exptmp); 1207 fix_new_exp (frag, where, nbytes, &exptmp, 0, 1208 (enum bfd_reloc_code_real) reloc_type); 1209 } 1210 else 1211 { 1212 fix_new_exp (frag, where, nbytes, exp, 0, 1213 nbytes == 2 ? BFD_RELOC_16 1214 : nbytes == 8 ? BFD_RELOC_64 1215 : BFD_RELOC_32); 1216 } 1217 } 1218 1219 /* Functions concerning relocs. */ 1221 1222 /* The location from which a PC relative jump should be calculated, 1223 given a PC relative reloc. */ 1224 1225 long 1226 md_pcrel_from (fixS *fixP) 1227 { 1228 /* Return the address of the delay slot. */ 1229 return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size; 1230 } 1231 1232 /* Apply a fixup to the object code. This is called for all the 1233 fixups we generated by the call to fix_new_exp, above. In the call 1234 above we used a reloc code which was the largest legal reloc code 1235 plus the operand index. Here we undo that to recover the operand 1236 index. At this point all symbol values should be fully resolved, 1237 and we attempt to completely resolve the reloc. If we can not do 1238 that, we determine the correct reloc code and put it back in the fixup. */ 1239 1240 void 1241 md_apply_fix (fixS *fixP, valueT * valP, segT seg) 1242 { 1243 valueT value = * valP; 1244 1245 if (fixP->fx_addsy == (symbolS *) NULL) 1246 fixP->fx_done = 1; 1247 1248 else if (fixP->fx_pcrel) 1249 { 1250 /* Hack around bfd_install_relocation brain damage. */ 1251 if (S_GET_SEGMENT (fixP->fx_addsy) != seg) 1252 value += md_pcrel_from (fixP); 1253 } 1254 1255 /* We can't actually support subtracting a symbol. */ 1256 if (fixP->fx_subsy != NULL) 1257 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 1258 1259 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) 1260 { 1261 int opindex; 1262 const struct arc_operand *operand; 1263 char *where; 1264 arc_insn insn; 1265 1266 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; 1267 1268 operand = &arc_operands[opindex]; 1269 1270 /* Fetch the instruction, insert the fully resolved operand 1271 value, and stuff the instruction back again. */ 1272 where = fixP->fx_frag->fr_literal + fixP->fx_where; 1273 if (target_big_endian) 1274 insn = bfd_getb32 ((unsigned char *) where); 1275 else 1276 insn = bfd_getl32 ((unsigned char *) where); 1277 insn = arc_insert_operand (insn, operand, -1, NULL, (offsetT) value, 1278 fixP->fx_file, fixP->fx_line); 1279 if (target_big_endian) 1280 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); 1281 else 1282 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 1283 1284 if (fixP->fx_done) 1285 /* Nothing else to do here. */ 1286 return; 1287 1288 /* Determine a BFD reloc value based on the operand information. 1289 We are only prepared to turn a few of the operands into relocs. 1290 !!! Note that we can't handle limm values here. Since we're using 1291 implicit addends the addend must be inserted into the instruction, 1292 however, the opcode insertion routines currently do nothing with 1293 limm values. */ 1294 if (operand->fmt == 'B') 1295 { 1296 gas_assert ((operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0 1297 && operand->bits == 20 1298 && operand->shift == 7); 1299 fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL; 1300 } 1301 else if (operand->fmt == 'J') 1302 { 1303 gas_assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0 1304 && operand->bits == 24 1305 && operand->shift == 32); 1306 fixP->fx_r_type = BFD_RELOC_ARC_B26; 1307 } 1308 else if (operand->fmt == 'L') 1309 { 1310 gas_assert ((operand->flags & ARC_OPERAND_LIMM) != 0 1311 && operand->bits == 32 1312 && operand->shift == 32); 1313 fixP->fx_r_type = BFD_RELOC_32; 1314 } 1315 else 1316 { 1317 as_bad_where (fixP->fx_file, fixP->fx_line, 1318 _("unresolved expression that must be resolved")); 1319 fixP->fx_done = 1; 1320 return; 1321 } 1322 } 1323 else 1324 { 1325 switch (fixP->fx_r_type) 1326 { 1327 case BFD_RELOC_8: 1328 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1329 value, 1); 1330 break; 1331 case BFD_RELOC_16: 1332 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1333 value, 2); 1334 break; 1335 case BFD_RELOC_32: 1336 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1337 value, 4); 1338 break; 1339 case BFD_RELOC_ARC_B26: 1340 /* If !fixP->fx_done then `value' is an implicit addend. 1341 We must shift it right by 2 in this case as well because the 1342 linker performs the relocation and then adds this in (as opposed 1343 to adding this in and then shifting right by 2). */ 1344 value >>= 2; 1345 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1346 value, 4); 1347 break; 1348 default: 1349 abort (); 1350 } 1351 } 1352 } 1353 1354 /* Translate internal representation of relocation info to BFD target 1355 format. */ 1356 1357 arelent * 1358 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, 1359 fixS *fixP) 1360 { 1361 arelent *reloc; 1362 1363 reloc = (arelent *) xmalloc (sizeof (arelent)); 1364 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 1365 1366 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); 1367 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; 1368 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 1369 if (reloc->howto == (reloc_howto_type *) NULL) 1370 { 1371 as_bad_where (fixP->fx_file, fixP->fx_line, 1372 _("internal error: can't export reloc type %d (`%s')"), 1373 fixP->fx_r_type, 1374 bfd_get_reloc_code_name (fixP->fx_r_type)); 1375 return NULL; 1376 } 1377 1378 gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); 1379 1380 /* Set addend to account for PC being advanced one insn before the 1381 target address is computed. */ 1382 1383 reloc->addend = (fixP->fx_pcrel ? -4 : 0); 1384 1385 return reloc; 1386 } 1387 1388 const pseudo_typeS md_pseudo_table[] = 1389 { 1390 { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0). */ 1391 { "comm", arc_common, 0 }, 1392 { "common", arc_common, 0 }, 1393 { "lcomm", arc_common, 1 }, 1394 { "lcommon", arc_common, 1 }, 1395 { "2byte", cons, 2 }, 1396 { "half", cons, 2 }, 1397 { "short", cons, 2 }, 1398 { "3byte", cons, 3 }, 1399 { "4byte", cons, 4 }, 1400 { "word", cons, 4 }, 1401 { "option", arc_option, 0 }, 1402 { "cpu", arc_option, 0 }, 1403 { "block", s_space, 0 }, 1404 { "extcondcode", arc_extoper, 0 }, 1405 { "extcoreregister", arc_extoper, 1 }, 1406 { "extauxregister", arc_extoper, 2 }, 1407 { "extinstruction", arc_extinst, 0 }, 1408 { NULL, 0, 0 }, 1409 }; 1410 1411 /* This routine is called for each instruction to be assembled. */ 1412 1413 void 1414 md_assemble (char *str) 1415 { 1416 const struct arc_opcode *opcode; 1417 const struct arc_opcode *std_opcode; 1418 struct arc_opcode *ext_opcode; 1419 char *start; 1420 const char *last_errmsg = 0; 1421 arc_insn insn; 1422 static int init_tables_p = 0; 1423 1424 /* Opcode table initialization is deferred until here because we have to 1425 wait for a possible .option command. */ 1426 if (!init_tables_p) 1427 { 1428 init_opcode_tables (arc_mach_type); 1429 init_tables_p = 1; 1430 } 1431 1432 /* Skip leading white space. */ 1433 while (ISSPACE (*str)) 1434 str++; 1435 1436 /* The instructions are stored in lists hashed by the first letter (though 1437 we needn't care how they're hashed). Get the first in the list. */ 1438 1439 ext_opcode = arc_ext_opcodes; 1440 std_opcode = arc_opcode_lookup_asm (str); 1441 1442 /* Keep looking until we find a match. */ 1443 start = str; 1444 for (opcode = (ext_opcode ? ext_opcode : std_opcode); 1445 opcode != NULL; 1446 opcode = (ARC_OPCODE_NEXT_ASM (opcode) 1447 ? ARC_OPCODE_NEXT_ASM (opcode) 1448 : (ext_opcode ? ext_opcode = NULL, std_opcode : NULL))) 1449 { 1450 int past_opcode_p, fc, num_suffixes; 1451 int fix_up_at = 0; 1452 char *syn; 1453 struct arc_fixup fixups[MAX_FIXUPS]; 1454 /* Used as a sanity check. If we need a limm reloc, make sure we ask 1455 for an extra 4 bytes from frag_more. */ 1456 int limm_reloc_p; 1457 int ext_suffix_p; 1458 const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES]; 1459 1460 /* Is this opcode supported by the selected cpu? */ 1461 if (! arc_opcode_supported (opcode)) 1462 continue; 1463 1464 /* Scan the syntax string. If it doesn't match, try the next one. */ 1465 arc_opcode_init_insert (); 1466 insn = opcode->value; 1467 fc = 0; 1468 past_opcode_p = 0; 1469 num_suffixes = 0; 1470 limm_reloc_p = 0; 1471 ext_suffix_p = 0; 1472 1473 /* We don't check for (*str != '\0') here because we want to parse 1474 any trailing fake arguments in the syntax string. */ 1475 for (str = start, syn = opcode->syntax; *syn != '\0';) 1476 { 1477 int mods; 1478 const struct arc_operand *operand; 1479 1480 /* Non operand chars must match exactly. */ 1481 if (*syn != '%' || *++syn == '%') 1482 { 1483 if (*str == *syn) 1484 { 1485 if (*syn == ' ') 1486 past_opcode_p = 1; 1487 ++syn; 1488 ++str; 1489 } 1490 else 1491 break; 1492 continue; 1493 } 1494 1495 /* We have an operand. Pick out any modifiers. */ 1496 mods = 0; 1497 while (ARC_MOD_P (arc_operands[arc_operand_map[(int) *syn]].flags)) 1498 { 1499 mods |= arc_operands[arc_operand_map[(int) *syn]].flags & ARC_MOD_BITS; 1500 ++syn; 1501 } 1502 operand = arc_operands + arc_operand_map[(int) *syn]; 1503 if (operand->fmt == 0) 1504 as_fatal (_("unknown syntax format character `%c'"), *syn); 1505 1506 if (operand->flags & ARC_OPERAND_FAKE) 1507 { 1508 const char *errmsg = NULL; 1509 if (operand->insert) 1510 { 1511 insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg); 1512 if (errmsg != (const char *) NULL) 1513 { 1514 last_errmsg = errmsg; 1515 if (operand->flags & ARC_OPERAND_ERROR) 1516 { 1517 as_bad ("%s", errmsg); 1518 return; 1519 } 1520 else if (operand->flags & ARC_OPERAND_WARN) 1521 as_warn ("%s", errmsg); 1522 break; 1523 } 1524 if (limm_reloc_p 1525 && (operand->flags && operand->flags & ARC_OPERAND_LIMM) 1526 && (operand->flags & 1527 (ARC_OPERAND_ABSOLUTE_BRANCH | ARC_OPERAND_ADDRESS))) 1528 { 1529 fixups[fix_up_at].opindex = arc_operand_map[operand->fmt]; 1530 } 1531 } 1532 ++syn; 1533 } 1534 /* Are we finished with suffixes? */ 1535 else if (!past_opcode_p) 1536 { 1537 int found; 1538 char c; 1539 char *s, *t; 1540 const struct arc_operand_value *suf, *suffix_end; 1541 const struct arc_operand_value *suffix = NULL; 1542 1543 if (!(operand->flags & ARC_OPERAND_SUFFIX)) 1544 abort (); 1545 1546 /* If we're at a space in the input string, we want to skip the 1547 remaining suffixes. There may be some fake ones though, so 1548 just go on to try the next one. */ 1549 if (*str == ' ') 1550 { 1551 ++syn; 1552 continue; 1553 } 1554 1555 s = str; 1556 if (mods & ARC_MOD_DOT) 1557 { 1558 if (*s != '.') 1559 break; 1560 ++s; 1561 } 1562 else 1563 { 1564 /* This can happen in "b.nd foo" and we're currently looking 1565 for "%q" (ie: a condition code suffix). */ 1566 if (*s == '.') 1567 { 1568 ++syn; 1569 continue; 1570 } 1571 } 1572 1573 /* Pick the suffix out and look it up via the hash table. */ 1574 for (t = s; *t && ISALNUM (*t); ++t) 1575 continue; 1576 c = *t; 1577 *t = '\0'; 1578 if ((suf = get_ext_suffix (s))) 1579 ext_suffix_p = 1; 1580 else 1581 suf = (const struct arc_operand_value *) 1582 hash_find (arc_suffix_hash, s); 1583 if (!suf) 1584 { 1585 /* This can happen in "blle foo" and we're currently using 1586 the template "b%q%.n %j". The "bl" insn occurs later in 1587 the table so "lle" isn't an illegal suffix. */ 1588 *t = c; 1589 break; 1590 } 1591 1592 /* Is it the right type? Note that the same character is used 1593 several times, so we have to examine all of them. This is 1594 relatively efficient as equivalent entries are kept 1595 together. If it's not the right type, don't increment `str' 1596 so we try the next one in the series. */ 1597 found = 0; 1598 if (ext_suffix_p && arc_operands[suf->type].fmt == *syn) 1599 { 1600 /* Insert the suffix's value into the insn. */ 1601 *t = c; 1602 if (operand->insert) 1603 insn = (*operand->insert) (insn, operand, 1604 mods, NULL, suf->value, 1605 NULL); 1606 else 1607 insn |= suf->value << operand->shift; 1608 suffix = suf; 1609 str = t; 1610 found = 1; 1611 } 1612 else 1613 { 1614 *t = c; 1615 suffix_end = arc_suffixes + arc_suffixes_count; 1616 for (suffix = suf; 1617 suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; 1618 ++suffix) 1619 { 1620 if (arc_operands[suffix->type].fmt == *syn) 1621 { 1622 /* Insert the suffix's value into the insn. */ 1623 if (operand->insert) 1624 insn = (*operand->insert) (insn, operand, 1625 mods, NULL, suffix->value, 1626 NULL); 1627 else 1628 insn |= suffix->value << operand->shift; 1629 1630 str = t; 1631 found = 1; 1632 break; 1633 } 1634 } 1635 } 1636 ++syn; 1637 if (!found) 1638 /* Wrong type. Just go on to try next insn entry. */ 1639 ; 1640 else 1641 { 1642 if (num_suffixes == MAX_SUFFIXES) 1643 as_bad (_("too many suffixes")); 1644 else 1645 insn_suffixes[num_suffixes++] = suffix; 1646 } 1647 } 1648 else 1649 /* This is either a register or an expression of some kind. */ 1650 { 1651 char *hold; 1652 const struct arc_operand_value *reg = NULL; 1653 long value = 0; 1654 expressionS exp; 1655 1656 if (operand->flags & ARC_OPERAND_SUFFIX) 1657 abort (); 1658 1659 /* Is there anything left to parse? 1660 We don't check for this at the top because we want to parse 1661 any trailing fake arguments in the syntax string. */ 1662 if (is_end_of_line[(unsigned char) *str]) 1663 break; 1664 1665 /* Parse the operand. */ 1666 hold = input_line_pointer; 1667 input_line_pointer = str; 1668 expression (&exp); 1669 str = input_line_pointer; 1670 input_line_pointer = hold; 1671 1672 if (exp.X_op == O_illegal) 1673 as_bad (_("illegal operand")); 1674 else if (exp.X_op == O_absent) 1675 as_bad (_("missing operand")); 1676 else if (exp.X_op == O_constant) 1677 value = exp.X_add_number; 1678 else if (exp.X_op == O_register) 1679 reg = (struct arc_operand_value *) exp.X_add_number; 1680 #define IS_REG_DEST_OPERAND(o) ((o) == 'a') 1681 else if (IS_REG_DEST_OPERAND (*syn)) 1682 as_bad (_("symbol as destination register")); 1683 else 1684 { 1685 if (!strncmp (str, "@h30", 4)) 1686 { 1687 arc_code_symbol (&exp); 1688 str += 4; 1689 } 1690 /* We need to generate a fixup for this expression. */ 1691 if (fc >= MAX_FIXUPS) 1692 as_fatal (_("too many fixups")); 1693 fixups[fc].exp = exp; 1694 /* We don't support shimm relocs. break here to force 1695 the assembler to output a limm. */ 1696 #define IS_REG_SHIMM_OFFSET(o) ((o) == 'd') 1697 if (IS_REG_SHIMM_OFFSET (*syn)) 1698 break; 1699 /* If this is a register constant (IE: one whose 1700 register value gets stored as 61-63) then this 1701 must be a limm. */ 1702 /* ??? This bit could use some cleaning up. 1703 Referencing the format chars like this goes 1704 against style. */ 1705 if (IS_SYMBOL_OPERAND (*syn)) 1706 { 1707 const char *junk; 1708 limm_reloc_p = 1; 1709 /* Save this, we don't yet know what reloc to use. */ 1710 fix_up_at = fc; 1711 /* Tell insert_reg we need a limm. This is 1712 needed because the value at this point is 1713 zero, a shimm. */ 1714 /* ??? We need a cleaner interface than this. */ 1715 (*arc_operands[arc_operand_map['Q']].insert) 1716 (insn, operand, mods, reg, 0L, &junk); 1717 } 1718 else 1719 fixups[fc].opindex = arc_operand_map[(int) *syn]; 1720 ++fc; 1721 value = 0; 1722 } 1723 1724 /* Insert the register or expression into the instruction. */ 1725 if (operand->insert) 1726 { 1727 const char *errmsg = NULL; 1728 insn = (*operand->insert) (insn, operand, mods, 1729 reg, (long) value, &errmsg); 1730 if (errmsg != (const char *) NULL) 1731 { 1732 last_errmsg = errmsg; 1733 if (operand->flags & ARC_OPERAND_ERROR) 1734 { 1735 as_bad ("%s", errmsg); 1736 return; 1737 } 1738 else if (operand->flags & ARC_OPERAND_WARN) 1739 as_warn ("%s", errmsg); 1740 break; 1741 } 1742 } 1743 else 1744 insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; 1745 1746 ++syn; 1747 } 1748 } 1749 1750 /* If we're at the end of the syntax string, we're done. */ 1751 /* FIXME: try to move this to a separate function. */ 1752 if (*syn == '\0') 1753 { 1754 int i; 1755 char *f; 1756 long limm, limm_p; 1757 1758 /* For the moment we assume a valid `str' can only contain blanks 1759 now. IE: We needn't try again with a longer version of the 1760 insn and it is assumed that longer versions of insns appear 1761 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1762 1763 while (ISSPACE (*str)) 1764 ++str; 1765 1766 if (!is_end_of_line[(unsigned char) *str]) 1767 as_bad (_("junk at end of line: `%s'"), str); 1768 1769 /* Is there a limm value? */ 1770 limm_p = arc_opcode_limm_p (&limm); 1771 1772 /* Perform various error and warning tests. */ 1773 1774 { 1775 static int in_delay_slot_p = 0; 1776 static int prev_insn_needs_cc_nop_p = 0; 1777 /* delay slot type seen */ 1778 int delay_slot_type = ARC_DELAY_NONE; 1779 /* conditional execution flag seen */ 1780 int conditional = 0; 1781 /* 1 if condition codes are being set */ 1782 int cc_set_p = 0; 1783 /* 1 if conditional branch, including `b' "branch always" */ 1784 int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH; 1785 1786 for (i = 0; i < num_suffixes; ++i) 1787 { 1788 switch (arc_operands[insn_suffixes[i]->type].fmt) 1789 { 1790 case 'n': 1791 delay_slot_type = insn_suffixes[i]->value; 1792 break; 1793 case 'q': 1794 conditional = insn_suffixes[i]->value; 1795 break; 1796 case 'f': 1797 cc_set_p = 1; 1798 break; 1799 } 1800 } 1801 1802 /* Putting an insn with a limm value in a delay slot is supposed to 1803 be legal, but let's warn the user anyway. Ditto for 8 byte 1804 jumps with delay slots. */ 1805 if (in_delay_slot_p && limm_p) 1806 as_warn (_("8 byte instruction in delay slot")); 1807 if (delay_slot_type != ARC_DELAY_NONE 1808 && limm_p && arc_insn_not_jl (insn)) /* except for jl addr */ 1809 as_warn (_("8 byte jump instruction with delay slot")); 1810 in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p; 1811 1812 /* Warn when a conditional branch immediately follows a set of 1813 the condition codes. Note that this needn't be done if the 1814 insn that sets the condition codes uses a limm. */ 1815 if (cond_branch_p && conditional != 0 /* 0 = "always" */ 1816 && prev_insn_needs_cc_nop_p && arc_mach_type == bfd_mach_arc_5) 1817 as_warn (_("conditional branch follows set of flags")); 1818 prev_insn_needs_cc_nop_p = 1819 /* FIXME: ??? not required: 1820 (delay_slot_type != ARC_DELAY_NONE) && */ 1821 cc_set_p && !limm_p; 1822 } 1823 1824 /* Write out the instruction. 1825 It is important to fetch enough space in one call to `frag_more'. 1826 We use (f - frag_now->fr_literal) to compute where we are and we 1827 don't want frag_now to change between calls. */ 1828 if (limm_p) 1829 { 1830 f = frag_more (8); 1831 md_number_to_chars (f, insn, 4); 1832 md_number_to_chars (f + 4, limm, 4); 1833 dwarf2_emit_insn (8); 1834 } 1835 else if (limm_reloc_p) 1836 /* We need a limm reloc, but the tables think we don't. */ 1837 abort (); 1838 else 1839 { 1840 f = frag_more (4); 1841 md_number_to_chars (f, insn, 4); 1842 dwarf2_emit_insn (4); 1843 } 1844 1845 /* Create any fixups. */ 1846 for (i = 0; i < fc; ++i) 1847 { 1848 int op_type, reloc_type; 1849 expressionS exptmp; 1850 const struct arc_operand *operand; 1851 1852 /* Create a fixup for this operand. 1853 At this point we do not use a bfd_reloc_code_real_type for 1854 operands residing in the insn, but instead just use the 1855 operand index. This lets us easily handle fixups for any 1856 operand type, although that is admittedly not a very exciting 1857 feature. We pick a BFD reloc type in md_apply_fix. 1858 1859 Limm values (4 byte immediate "constants") must be treated 1860 normally because they're not part of the actual insn word 1861 and thus the insertion routines don't handle them. */ 1862 1863 if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM) 1864 { 1865 /* Modify the fixup addend as required by the cpu. */ 1866 fixups[i].exp.X_add_number += arc_limm_fixup_adjust (insn); 1867 op_type = fixups[i].opindex; 1868 /* FIXME: can we add this data to the operand table? */ 1869 if (op_type == arc_operand_map['L'] 1870 || op_type == arc_operand_map['s'] 1871 || op_type == arc_operand_map['o'] 1872 || op_type == arc_operand_map['O']) 1873 reloc_type = BFD_RELOC_32; 1874 else if (op_type == arc_operand_map['J']) 1875 reloc_type = BFD_RELOC_ARC_B26; 1876 else 1877 abort (); 1878 reloc_type = get_arc_exp_reloc_type (1, reloc_type, 1879 &fixups[i].exp, 1880 &exptmp); 1881 } 1882 else 1883 { 1884 op_type = get_arc_exp_reloc_type (0, fixups[i].opindex, 1885 &fixups[i].exp, &exptmp); 1886 reloc_type = op_type + (int) BFD_RELOC_UNUSED; 1887 } 1888 operand = &arc_operands[op_type]; 1889 fix_new_exp (frag_now, 1890 ((f - frag_now->fr_literal) 1891 + (operand->flags & ARC_OPERAND_LIMM ? 4 : 0)), 4, 1892 &exptmp, 1893 (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0, 1894 (bfd_reloc_code_real_type) reloc_type); 1895 } 1896 return; 1897 } 1898 } 1899 1900 if (NULL == last_errmsg) 1901 as_bad (_("bad instruction `%s'"), start); 1902 else 1903 as_bad ("%s", last_errmsg); 1904 } 1905
