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    Searched defs:immr (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/AArch64/InstPrinter/
AArch64InstPrinter.cpp 113 int64_t immr = Op2.getImm(); local
115 if (Opcode == AArch64::UBFMWri && imms != 0x1F && ((imms + 1) == immr)) {
119 ((imms + 1 == immr))) {
124 shift = immr;
127 shift = immr;
130 shift = immr;
133 shift = immr;
163 int ImmR = MI->getOperand(3).getImm();
167 (ImmR == 0 || ImmS < ImmR)) {
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  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AddressingModes.h 212 /// the form N:immr:imms.
251 // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
255 unsigned Immr = (Size - I) & (Size - 1);
268 Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
290 /// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
293 // Extract the N, imms, and immr fields.
295 unsigned immr = (val >> 6) & 0x3f; local
302 unsigned R = immr & (size - 1);
318 /// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits
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  /toolchain/binutils/binutils-2.25/opcodes/
aarch64-dis.c 565 /* Decode imm for e.g. BFM <Wd>, <Wn>, #<immr>, #<imms>.
728 /* value is N:immr:imms. */
1557 int64_t immr, imms; local
1584 int64_t immr, imms, val; local
1611 int64_t immr = inst->operands[2].imm.value; local
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  /external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 1643 int immr = SrlImm - ShlImm; local
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