/external/mesa3d/src/gallium/drivers/r600/ |
r600_isa.c | 560 unsigned opc; local 573 unsigned opc = op->opcode[isa->hw_class]; local 581 unsigned opc = op->opcode[isa->hw_class]; local [all...] |
/external/libunwind/include/tdep-ia64/ |
script.h | 36 unsigned int opc; /* see enum ia64_script_insn_opcode */ member in struct:ia64_script_insn
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
SPUInstrInfo.cpp | 33 unsigned opc = I->getOpcode(); local 35 return (opc == SPU::BR 36 || opc == SPU::BRA 37 || opc == SPU::BI); 42 unsigned opc = I->getOpcode(); local 44 return (opc == SPU::BRNZr32 45 || opc == SPU::BRNZv4i32 46 || opc == SPU::BRZr32 47 || opc == SPU::BRZv4i32 48 || opc == SPU::BRHNZr1 145 unsigned opc; local 180 unsigned opc; local [all...] |
/toolchain/binutils/binutils-2.25/opcodes/ |
fr30-asm.c | 35 #include "fr30-opc.h" 351 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 358 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 349 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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m32r-asm.c | 35 #include "m32r-opc.h" 369 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 376 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 367 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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or1k-asm.c | 35 #include "or1k-opc.h" 544 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 551 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 542 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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xc16x-asm.c | 35 #include "xc16x-opc.h" 417 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 424 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 415 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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xstormy16-asm.c | 35 #include "xstormy16-opc.h" 317 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 324 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 315 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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xtensa-dis.c | 77 xtensa_opcode opc, 93 (void) xtensa_operand_decode (isa, opc, opnd, &operand_val); 96 if (xtensa_operand_is_register (isa, opc, opnd) == 0) 98 if (xtensa_operand_is_PCrelative (isa, opc, opnd) == 1) 100 (void) xtensa_operand_undo_reloc (isa, opc, opnd, 116 xtensa_regfile opnd_rf = xtensa_operand_regfile (isa, opc, opnd); 120 while (i < xtensa_operand_num_regs (isa, opc, opnd)) 141 xtensa_opcode opc; local 234 opc = xtensa_opcode_decode (isa, fmt, n, slot_buffer); 236 xtensa_opcode_name (isa, opc)); [all...] |
epiphany-asm.c | 35 #include "epiphany-opc.h" 497 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 504 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 494 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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frv-asm.c | 35 #include "frv-opc.h" 1302 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local [all...] |
ip2k-asm.c | 35 #include "ip2k-opc.h" 552 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 559 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 550 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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iq2000-asm.c | 35 #include "iq2000-opc.h" 500 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 507 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 498 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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lm32-asm.c | 35 #include "lm32-opc.h" 390 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 397 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 388 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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mt-asm.c | 35 #include "mt-opc.h" 636 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 643 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 634 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); local
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nds32-dis.c | 227 nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, 242 if (opc == NULL) 251 pstr_src = opc->instruction; 254 func (stream, "%s", opc->opcode); 260 func (stream, "%s ", opc->opcode); 268 func (stream, "%s.", opc->opcode); 269 else if (strstr (opc->instruction, "tito")) 270 func (stream, "%s", opc->opcode); 272 func (stream, "%s ", opc->opcode); 315 if ((opc->value == 0xfc00) || (opc->value == 0xfc80) 589 struct nds32_opcode *opc; local 602 struct nds32_opcode *opc; local 982 struct nds32_opcode *opc; local [all...] |
tilegx-opc.c | 8086 const struct tilegx_opcode *opc; local [all...] |
tilepro-opc.c | 10205 const struct tilepro_opcode *opc; local [all...] |
/external/clang/lib/StaticAnalyzer/Checkers/ |
MallocOverflowSecurityChecker.cpp | 83 BinaryOperatorKind opc = binop->getOpcode(); local 85 if (mulop == nullptr && opc == BO_Mul) 87 if (opc != BO_Mul && opc != BO_Add && opc != BO_Sub && opc != BO_Shl) 95 if (EvaluatesToZero(maxVal, opc)) 97 } else if ((opc == BO_Add || opc == BO_Mul) && 100 if (EvaluatesToZero(maxVal, opc)) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonNewValueJump.cpp | 637 unsigned opc = getNewValueJumpOpcode(cmpInstr, cmpOp2, local 641 opc = QII->getInvertedPredicatedOpcode(opc); 645 QII->get(opc)) 656 QII->get(opc)) 662 QII->get(opc))
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/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
ir-a2xx.h | 73 instr_fetch_opc_t opc; member in struct:ir2_instruction::__anon27640::__anon27641 162 instr->fetch.opc = VTX_FETCH; 174 instr->fetch.opc = TEX_FETCH;
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/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
disasm-a3xx.c | 155 switch (cat0->opc) { 246 switch (_OPC(2, cat2->opc)) { 277 switch (_OPC(2, cat2->opc)) { 426 switch (_OPC(5, cat5->opc)) { 443 if (info[cat5->opc].src1) { 457 if (cat5->is_o || info[cat5->opc].src2) { 462 if (info[cat5->opc].samp) 464 if (info[cat5->opc].tex) 491 switch (_OPC(6, cat6->opc)) { 522 switch (_OPC(6, cat6->opc)) { 655 uint16_t opc; member in struct:opc_info 832 uint32_t opc = instr_opc(instr); local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
ARMAsmBackend.cpp | 241 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 local 244 opc = 2; // 0b0010 249 return ARM_AM::getSOImmVal(Value) | (opc << 21); 254 unsigned opc = 0; local 257 opc = 5; 260 uint32_t out = (opc << 21);
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/frameworks/compile/mclinker/lib/Target/AArch64/ |
AArch64InsnHelpers.h | 199 unsigned opc = getBits(insn, 22, 2); local 201 unsigned opc_v = opc | (v << 2);
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/packages/apps/Gallery2/src/com/android/gallery3d/filtershow/colorpicker/ |
ColorSVRectView.java | 183 double opc = mHSVO[3]; local
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