/external/llvm/test/MC/ARM/ |
arm-arithmetic-aliases.s | 36 orr r2, r2, #6 label 37 orr r2, #6 label 38 orr r2, r2, r3 label 39 orr r2, r3 label 41 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3] 42 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3] 43 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1] 44 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
arm-arithmetic-aliases.s | 36 orr r2, r2, #6 label 37 orr r2, #6 label 38 orr r2, r2, r3 label 39 orr r2, r3 label 41 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3] 42 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3] 43 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1] 44 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
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/external/llvm/test/MC/AArch64/ |
arm64-diags.s | 258 orr w0, w0, w0, lsl #32 label 260 ; CHECK-ERRORS: orr w0, w0, w0, lsl #32
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/external/boringssl/src/crypto/curve25519/asm/ |
x25519-asm-arm.S | 79 orr r6,r6,#64 label [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
allinsn.s | 1206 orr ip,ip,ip 1207 orr r3,r3,r3 1208 orr r0,r0,r0 1209 orr fp,fp,fp 1210 orr sp,sp,sp 1211 orr lr,r1,sp 1212 orr r3,lr,lr 1213 orr r2,r3,r2 1215 .global orr 1216 orr label [all...] |
/external/vixl/src/aarch64/ |
assembler-aarch64.cc | 526 void Assembler::orr(const Register& rd, function in class:vixl::aarch64::Assembler 529 Logical(rd, rn, operand, ORR); [all...] |
logic-aarch64.cc | 1229 LogicVRegister Simulator::orr(VectorFormat vform, function in class:vixl::aarch64::Simulator 2493 LogicVRegister Simulator::orr(VectorFormat vform, function in class:vixl::aarch64::Simulator [all...] |
/external/v8/src/arm/ |
assembler-arm.cc | 934 // orr dst, dst, #target8_1 << 8 935 // orr dst, dst, #target8_2 << 16 963 // Patch with a sequence of mov/orr/orr instructions. 971 patcher.masm()->orr(dst, dst, Operand(target8_1 << 8)); 976 patcher.masm()->orr(dst, dst, Operand(target8_1 << 8)); 977 patcher.masm()->orr(dst, dst, Operand(target8_2 << 16)); 1584 void Assembler::orr(Register dst, Register src1, const Operand& src2, function in class:v8::internal::Assembler [all...] |
/external/v8/src/arm64/ |
assembler-arm64.cc | 1221 void Assembler::orr(const Register& rd, function in class:v8::internal::Assembler [all...] |
/external/skia/tests/ |
PathTest.cpp | 4774 SkRRect orr; local [all...] |
/external/vixl/src/aarch32/ |
assembler-aarch32.cc | 7125 void Assembler::orr(Condition cond, function in class:vixl::aarch32::Assembler [all...] |
assembler-aarch32.h | 2658 void orr(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler 2661 void orr(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler 2664 void orr(EncodingSize size, function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.cc | 2012 void Disassembler::orr(Condition cond, function in class:vixl::aarch32::Disassembler [all...] |