| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| nv50_transfer.h | 18 uint16_t tile_mode; member in struct:nv50_m2mf_rect
|
| nv50_resource.h | 43 uint32_t tile_mode; member in struct:nv50_miptree_level
|
| nv50_miptree.c | 35 uint32_t tile_mode = 0x000; local
37 if (ny > 64) tile_mode = 0x040; /* height 128 tiles */
39 if (ny > 32) tile_mode = 0x030; /* height 64 tiles */
41 if (ny > 16) tile_mode = 0x020; /* height 32 tiles */
43 if (ny > 8) tile_mode = 0x010; /* height 16 tiles */
46 return tile_mode;
48 if (tile_mode > 0x020)
49 tile_mode = 0x020;
51 if (nz > 16 && tile_mode < 0x020)
52 return tile_mode | 0x500; /* depth 32 tiles *
[all...] |
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 54 uint32_t tile_mode; local
61 tile_mode = info->si_tile_mode_array[surf->tiling_index[0]];
64 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode);
66 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode);
|
| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_surface.c | 269 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; local
272 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode);
274 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode);
|
| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| fd5_gmem.c | 49 enum a5xx_tile_mode tile_mode; local
53 tile_mode = TILE5_2;
55 tile_mode = TILE5_LINEAR;
97 A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) |
|
| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_surface.c | 278 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; local
281 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode);
283 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode);
|
| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| fd3_gmem.c | 51 enum a3xx_tile_mode tile_mode; local
55 tile_mode = TILE_32X32;
57 tile_mode = LINEAR;
113 A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) |
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| fd4_gmem.c | 52 enum a4xx_tile_mode tile_mode; local
56 tile_mode = 2;
58 tile_mode = TILE4_LINEAR;
116 A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) |
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_dma.c | 146 unsigned tile_mode = info->si_tile_mode_array[index]; local
169 array_mode = G_009910_ARRAY_MODE(tile_mode);
182 bank_h = G_009910_BANK_HEIGHT(tile_mode);
183 bank_w = G_009910_BANK_WIDTH(tile_mode);
184 mt_aspect = G_009910_MACRO_TILE_ASPECT(tile_mode);
187 nbanks = G_009910_NUM_BANKS(tile_mode);
191 pipe_config = G_009910_PIPE_CONFIG(tile_mode);
192 mt = G_009910_MICRO_TILE_MODE(tile_mode);
|
| cik_sdma.c | 125 unsigned tile_mode = info->si_tile_mode_array[tile_index]; local
129 (G_009910_ARRAY_MODE(tile_mode) << 3) |
130 (G_009910_MICRO_TILE_MODE_NEW(tile_mode) << 8) |
137 (G_009910_PIPE_CONFIG(tile_mode) << 26);
|
| si_state.c | 2237 unsigned tile_mode = info->si_tile_mode_array[index]; local
[all...] |
| /hardware/qcom/media/sdm845/libc2dcolorconvert/ |
| C2DColorConverter.cpp | 481 int32_t tile_mode = 0; local
489 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
496 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
|
| /bionic/libc/kernel/uapi/drm/ |
| nouveau_drm.h | 42 __u32 tile_mode; member in struct:drm_nouveau_gem_info
|
| /external/kernel-headers/original/uapi/drm/ |
| nouveau_drm.h | 55 __u32 tile_mode; member in struct:drm_nouveau_gem_info
|
| /external/libdrm/nouveau/ |
| nouveau.h | 103 uint32_t tile_mode; member in struct:nouveau_bo_config::__anon23258
107 uint32_t tile_mode; member in struct:nouveau_bo_config::__anon23259
|
| /hardware/qcom/media/msm8996/libc2dcolorconvert/ |
| C2DColorConverter.cpp | 492 int32_t tile_mode = 0; local
500 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
507 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
|
| /hardware/qcom/media/msm8998/libc2dcolorconvert/ |
| C2DColorConverter.cpp | 499 int32_t tile_mode = 0; local
507 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
514 mAdrenoComputeAlignedWidthAndHeight(width, height, bpp, tile_mode, raster_mode, padding_threshold,
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/drm/ |
| nouveau_drm.h | 102 uint32_t tile_mode; member in struct:drm_nouveau_gem_info
190 uint32_t tile_mode; member in struct:drm_nouveau_gem_tile
|
| /external/libdrm/include/drm/ |
| nouveau_drm.h | 121 uint32_t tile_mode; member in struct:drm_nouveau_gem_info
127 uint32_t tile_mode; member in struct:drm_nouveau_gem_set_tiling
254 uint32_t tile_mode; member in struct:drm_nouveau_gem_map
|
| /external/mesa3d/src/amd/vulkan/ |
| radv_device.c | 1782 unsigned tile_mode = info->si_tile_mode_array[tiling_index]; local
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/drm/ |
| nouveau_drm.h | 110 uint32_t tile_mode; member in struct:drm_nouveau_gem_info
|
| /external/libdrm/radeon/ |
| radeon_surface.c | 1731 unsigned mode, tile_mode, stencil_tile_mode; local
1791 unsigned mode, tile_mode, stencil_tile_mode; local
2335 unsigned mode, tile_mode, stencil_tile_mode; local
2395 unsigned mode, tile_mode, stencil_tile_mode; local
[all...] |
