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      1 /*
      2  *  Copyright (c) 2014 The WebM project authors. All Rights Reserved.
      3  *
      4  *  Use of this source code is governed by a BSD-style license
      5  *  that can be found in the LICENSE file in the root of the source
      6  *  tree. An additional intellectual property rights grant can be found
      7  *  in the file PATENTS.  All contributing project authors may
      8  *  be found in the AUTHORS file in the root of the source tree.
      9  */
     10 
     11 #include <arm_neon.h>
     12 #include "vpx_ports/arm.h"
     13 
     14 #ifdef VPX_INCOMPATIBLE_GCC
     15 #include "./vp8_rtcd.h"
     16 void vp8_short_walsh4x4_neon(int16_t *input, int16_t *output, int pitch) {
     17   vp8_short_walsh4x4_c(input, output, pitch);
     18 }
     19 #else
     20 void vp8_short_walsh4x4_neon(int16_t *input, int16_t *output, int pitch) {
     21   uint16x4_t d16u16;
     22   int16x8_t q0s16, q1s16;
     23   int16x4_t dEmptys16, d0s16, d1s16, d2s16, d3s16, d4s16, d5s16, d6s16, d7s16;
     24   int32x4_t qEmptys32, q0s32, q1s32, q2s32, q3s32, q8s32;
     25   int32x4_t q9s32, q10s32, q11s32, q15s32;
     26   uint32x4_t q8u32, q9u32, q10u32, q11u32;
     27   int16x4x2_t v2tmp0, v2tmp1;
     28   int32x2x2_t v2tmp2, v2tmp3;
     29 
     30   dEmptys16 = vdup_n_s16(0);
     31   qEmptys32 = vdupq_n_s32(0);
     32   q15s32 = vdupq_n_s32(3);
     33 
     34   d0s16 = vld1_s16(input);
     35   input += pitch / 2;
     36   d1s16 = vld1_s16(input);
     37   input += pitch / 2;
     38   d2s16 = vld1_s16(input);
     39   input += pitch / 2;
     40   d3s16 = vld1_s16(input);
     41 
     42   v2tmp2 = vtrn_s32(vreinterpret_s32_s16(d0s16), vreinterpret_s32_s16(d2s16));
     43   v2tmp3 = vtrn_s32(vreinterpret_s32_s16(d1s16), vreinterpret_s32_s16(d3s16));
     44   v2tmp0 = vtrn_s16(vreinterpret_s16_s32(v2tmp2.val[0]),   // d0
     45                     vreinterpret_s16_s32(v2tmp3.val[0]));  // d1
     46   v2tmp1 = vtrn_s16(vreinterpret_s16_s32(v2tmp2.val[1]),   // d2
     47                     vreinterpret_s16_s32(v2tmp3.val[1]));  // d3
     48 
     49   d4s16 = vadd_s16(v2tmp0.val[0], v2tmp1.val[0]);
     50   d5s16 = vadd_s16(v2tmp0.val[1], v2tmp1.val[1]);
     51   d6s16 = vsub_s16(v2tmp0.val[1], v2tmp1.val[1]);
     52   d7s16 = vsub_s16(v2tmp0.val[0], v2tmp1.val[0]);
     53 
     54   d4s16 = vshl_n_s16(d4s16, 2);
     55   d5s16 = vshl_n_s16(d5s16, 2);
     56   d6s16 = vshl_n_s16(d6s16, 2);
     57   d7s16 = vshl_n_s16(d7s16, 2);
     58 
     59   d16u16 = vceq_s16(d4s16, dEmptys16);
     60   d16u16 = vmvn_u16(d16u16);
     61 
     62   d0s16 = vadd_s16(d4s16, d5s16);
     63   d3s16 = vsub_s16(d4s16, d5s16);
     64   d1s16 = vadd_s16(d7s16, d6s16);
     65   d2s16 = vsub_s16(d7s16, d6s16);
     66 
     67   d0s16 = vsub_s16(d0s16, vreinterpret_s16_u16(d16u16));
     68 
     69   // Second for-loop
     70   v2tmp2 = vtrn_s32(vreinterpret_s32_s16(d1s16), vreinterpret_s32_s16(d3s16));
     71   v2tmp3 = vtrn_s32(vreinterpret_s32_s16(d0s16), vreinterpret_s32_s16(d2s16));
     72   v2tmp0 = vtrn_s16(vreinterpret_s16_s32(v2tmp3.val[1]),   // d2
     73                     vreinterpret_s16_s32(v2tmp2.val[1]));  // d3
     74   v2tmp1 = vtrn_s16(vreinterpret_s16_s32(v2tmp3.val[0]),   // d0
     75                     vreinterpret_s16_s32(v2tmp2.val[0]));  // d1
     76 
     77   q8s32 = vaddl_s16(v2tmp1.val[0], v2tmp0.val[0]);
     78   q9s32 = vaddl_s16(v2tmp1.val[1], v2tmp0.val[1]);
     79   q10s32 = vsubl_s16(v2tmp1.val[1], v2tmp0.val[1]);
     80   q11s32 = vsubl_s16(v2tmp1.val[0], v2tmp0.val[0]);
     81 
     82   q0s32 = vaddq_s32(q8s32, q9s32);
     83   q1s32 = vaddq_s32(q11s32, q10s32);
     84   q2s32 = vsubq_s32(q11s32, q10s32);
     85   q3s32 = vsubq_s32(q8s32, q9s32);
     86 
     87   q8u32 = vcltq_s32(q0s32, qEmptys32);
     88   q9u32 = vcltq_s32(q1s32, qEmptys32);
     89   q10u32 = vcltq_s32(q2s32, qEmptys32);
     90   q11u32 = vcltq_s32(q3s32, qEmptys32);
     91 
     92   q8s32 = vreinterpretq_s32_u32(q8u32);
     93   q9s32 = vreinterpretq_s32_u32(q9u32);
     94   q10s32 = vreinterpretq_s32_u32(q10u32);
     95   q11s32 = vreinterpretq_s32_u32(q11u32);
     96 
     97   q0s32 = vsubq_s32(q0s32, q8s32);
     98   q1s32 = vsubq_s32(q1s32, q9s32);
     99   q2s32 = vsubq_s32(q2s32, q10s32);
    100   q3s32 = vsubq_s32(q3s32, q11s32);
    101 
    102   q8s32 = vaddq_s32(q0s32, q15s32);
    103   q9s32 = vaddq_s32(q1s32, q15s32);
    104   q10s32 = vaddq_s32(q2s32, q15s32);
    105   q11s32 = vaddq_s32(q3s32, q15s32);
    106 
    107   d0s16 = vshrn_n_s32(q8s32, 3);
    108   d1s16 = vshrn_n_s32(q9s32, 3);
    109   d2s16 = vshrn_n_s32(q10s32, 3);
    110   d3s16 = vshrn_n_s32(q11s32, 3);
    111 
    112   q0s16 = vcombine_s16(d0s16, d1s16);
    113   q1s16 = vcombine_s16(d2s16, d3s16);
    114 
    115   vst1q_s16(output, q0s16);
    116   vst1q_s16(output + 8, q1s16);
    117   return;
    118 }
    119 #endif  // VPX_INCOMPATIBLE_GCC
    120