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Searched
refs:BIT24
(Results
1 - 25
of
85
) sorted by null
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/device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/Omap3530/
Omap3530Prcm.h
51
#define CM_FCLKEN1_CORE_EN_MMC1_MASK
BIT24
53
#define CM_FCLKEN1_CORE_EN_MMC1_ENABLE
BIT24
59
#define CM_ICLKEN1_CORE_EN_MMC1_MASK
BIT24
61
#define CM_ICLKEN1_CORE_EN_MMC1_ENABLE
BIT24
Omap3530Gpmc.h
66
#define PAGEBURSTACCESSTIME
BIT24
72
#define WRACCESSTIME
BIT24
Omap3530Dma.h
108
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE
BIT24
Omap3530MMCHS.h
94
#define IWE
BIT24
106
#define SRA
BIT24
/device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
Omap3530Prcm.h
51
#define CM_FCLKEN1_CORE_EN_MMC1_MASK
BIT24
53
#define CM_FCLKEN1_CORE_EN_MMC1_ENABLE
BIT24
59
#define CM_ICLKEN1_CORE_EN_MMC1_MASK
BIT24
61
#define CM_ICLKEN1_CORE_EN_MMC1_ENABLE
BIT24
Omap3530Gpmc.h
66
#define PAGEBURSTACCESSTIME
BIT24
72
#define WRACCESSTIME
BIT24
Omap3530Dma.h
108
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE
BIT24
Omap3530MMCHS.h
94
#define IWE
BIT24
106
#define SRA
BIT24
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
PchRegsPcie.h
72
#define B_PCH_PCIE_SLCTL_SLSTS_DLLSC
BIT24
// Data Link Layer State Changed
PchRegsPcu.h
[
all
...]
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
general_definitions.h
41
#undef
BIT24
77
#define
BIT24
0x01000000U
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/
XPressRich3.h
53
#define PCIE_INT_A
BIT24
/device/linaro/bootloader/edk2/OvmfPkg/Library/AcpiTimerLib/
AcpiTimerLib.c
26
#define ACPI_TIMER_COUNT_SIZE
BIT24
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/
BoardFeatures.h
75
#define B_BOARD_FEATURES_ALT_MEM_CLK_RT
BIT24
165
#define B_BOARD_FEATURES_MEMORY_SLOT_MASK (
BIT24
| BIT23)
166
#define V_BOARD_FEATURES_1_MEMORY_SLOT 0 // BIT23=0,
BIT24
=0
167
#define V_BOARD_FEATURES_2_MEMORY_SLOT BIT23 // BIT23=1,
BIT24
=0
168
#define V_BOARD_FEATURES_3_MEMORY_SLOT
BIT24
// BIT23=0,
BIT24
=1
169
#define V_BOARD_FEATURES_4_MEMORY_SLOT (
BIT24
| BIT23) // BIT23=1,
BIT24
=1
/device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
Virtio.h
170
#define VIRTIO_F_NOTIFY_ON_EMPTY
BIT24
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/
CommonIncludes.h
92
#define
BIT24
0x01000000
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/
AhciMode.h
108
#define EFI_AHCI_PORT_IS_OFS
BIT24
134
#define EFI_AHCI_PORT_CMD_ATAPI
BIT24
177
#define EFI_AHCI_PORT_SERR_TSTE
BIT24
/device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/AcpiTimerLib/
AcpiTimerLib.c
25
#define ACPI_TIMER_COUNT_SIZE
BIT24
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/
PchRegs.h
70
#define
BIT24
0x01000000
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/
UartInit.c
179
MmioAndThenOr32 (PMC_BASE_ADDRESS + R_PCH_PMC_GEN_PMCON_1, (UINT32) (~(B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR + B_PCH_PMC_GEN_PMCON_PWROK_FLR)),
BIT24
);
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
XhciReg.h
79
#define USBLEGSP_OS_SEMAPHORE
BIT24
// HC OS Owned Semaphore
181
#define XHC_PORTSC_CAS
BIT24
// Cold Attach Status
/device/linaro/bootloader/edk2/ArmVirtPkg/VirtFdtDxe/
VirtFdtDxe.c
125
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 |
BIT24
)
126
#define DTB_PCI_HOST_RANGE_IO
BIT24
127
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 |
BIT24
)
/device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/
BaseTypes.h
245
#define
BIT24
0x01000000
/system/bt/embdrv/sbc/decoder/include/
oi_stddefs.h
295
#define
BIT24
\
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
QuarkNcSocId.h
342
#define B_MUXTOP_FLEX2_MASK (BIT25 |
BIT24
| BIT23)
561
#define B_QNC_LPC_FWH_BIOS_DEC_C0 (
BIT24
)
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