| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 552 void Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
[all...] |
| assembler_mips64.cc | 718 void Mips64Assembler::Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16) {
804 Bltc(rs, rt, imm16_21);
813 Bltc(rt, rs, imm16_21);
[all...] |
| assembler_mips64_test.cc | 819 TEST_F(AssemblerMIPS64Test, Bltc) {
820 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltc, "Bltc");
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_mips64.cc | [all...] |
| code_generator_mips64.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | [all...] |
| assembler_mips.h | 338 void Bltc(Register rs, Register rt, uint16_t imm16); // R6
[all...] |
