/external/libvpx/libvpx/vpx_dsp/ |
fwd_txfm.h | 17 tran_high_t rv = ROUND_POWER_OF_TWO(input, DCT_CONST_BITS);
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txfm_common.h | 17 #define DCT_CONST_BITS 14 18 #define DCT_CONST_ROUNDING (1 << (DCT_CONST_BITS - 1))
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inv_txfm.h | 39 tran_high_t rv = ROUND_POWER_OF_TWO(input, DCT_CONST_BITS);
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/external/libvpx/libvpx/vp9/encoder/x86/ |
vp9_dct_intrin_sse2.c | 96 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); 97 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); 98 u[2] = _mm_srai_epi32(v[2], DCT_CONST_BITS); 99 u[3] = _mm_srai_epi32(v[3], DCT_CONST_BITS); 144 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); 145 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); 146 u[2] = _mm_srai_epi32(v[2], DCT_CONST_BITS); 147 u[3] = _mm_srai_epi32(v[3], DCT_CONST_BITS); 284 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); 285 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); [all...] |
vp9_dct_ssse3.c | 127 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); 128 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); 129 const __m128i w2 = _mm_srai_epi32(v2, DCT_CONST_BITS); 130 const __m128i w3 = _mm_srai_epi32(v3, DCT_CONST_BITS); 132 const __m128i w4 = _mm_srai_epi32(v4, DCT_CONST_BITS); 133 const __m128i w5 = _mm_srai_epi32(v5, DCT_CONST_BITS); 134 const __m128i w6 = _mm_srai_epi32(v6, DCT_CONST_BITS); 135 const __m128i w7 = _mm_srai_epi32(v7, DCT_CONST_BITS); 178 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); 179 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
itrans8_dspr2.c | 642 x0 = ROUND_POWER_OF_TWO((s0 + s4), DCT_CONST_BITS); 643 x1 = ROUND_POWER_OF_TWO((s1 + s5), DCT_CONST_BITS); 644 x2 = ROUND_POWER_OF_TWO((s2 + s6), DCT_CONST_BITS); 645 x3 = ROUND_POWER_OF_TWO((s3 + s7), DCT_CONST_BITS); 646 x4 = ROUND_POWER_OF_TWO((s0 - s4), DCT_CONST_BITS); 647 x5 = ROUND_POWER_OF_TWO((s1 - s5), DCT_CONST_BITS); 648 x6 = ROUND_POWER_OF_TWO((s2 - s6), DCT_CONST_BITS); 649 x7 = ROUND_POWER_OF_TWO((s3 - s7), DCT_CONST_BITS); [all...] |
txfm_macros_msa.h | 32 SRARI_W2_SW(s1_m, s0_m, DCT_CONST_BITS); \ 36 SRARI_W2_SW(s1_m, s0_m, DCT_CONST_BITS); \ 52 SRARI_W4_SW(tp1_m, tp9_m, tp7_m, tp5_m, DCT_CONST_BITS); \ 53 SRARI_W4_SW(tp3_m, tp0_m, tp4_m, tp2_m, DCT_CONST_BITS); \ 64 SRARI_W2_SW(tp1_m, tp0_m, DCT_CONST_BITS); \ 78 SRARI_W4_SW(madd0_m, madd1_m, madd2_m, madd3_m, DCT_CONST_BITS); \ 93 SRARI_W4_SW(m4_m, m5_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \ 98 SRARI_W4_SW(m4_m, m5_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \
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idct8x8_msa.c | 59 SRARI_W4_SW(tmp0, tmp1, tmp2, tmp3, DCT_CONST_BITS); 71 SRARI_W4_SW(tmp0, tmp1, tmp2, tmp3, DCT_CONST_BITS); 81 SRARI_W2_SW(tmp0, tmp1, DCT_CONST_BITS); 108 out = ROUND_POWER_OF_TWO((input[0] * cospi_16_64), DCT_CONST_BITS); 109 out = ROUND_POWER_OF_TWO((out * cospi_16_64), DCT_CONST_BITS);
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fwd_txfm_msa.h | 41 SRARI_W4_SW(vec4_m, vec5_m, vec6_m, vec7_m, DCT_CONST_BITS); \ 344 tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \ 345 tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \ 346 tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \ 347 tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \ 353 tp0_m = __msa_srari_d(tp0_m, DCT_CONST_BITS); \ 354 tp1_m = __msa_srari_d(tp1_m, DCT_CONST_BITS); \ 355 tp2_m = __msa_srari_d(tp2_m, DCT_CONST_BITS); \ 356 tp3_m = __msa_srari_d(tp3_m, DCT_CONST_BITS); \
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inv_txfm_msa.h | 126 SRARI_W4_SW(tmp0_m, tmp1_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \ 179 SRARI_W4_SW(int0_m, int1_m, int2_m, int3_m, DCT_CONST_BITS); \ 205 SRARI_W4_SW(tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd, DCT_CONST_BITS); \ 209 SRARI_W4_SW(tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd, DCT_CONST_BITS); \ 235 SRARI_W4_SW(tmp0_m, tmp1_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \ 273 SRARI_W4_SW(m0_m, m1_m, m2_m, m3_m, DCT_CONST_BITS); \ 277 SRARI_W4_SW(m0_m, m1_m, m2_m, m3_m, DCT_CONST_BITS); \ 291 SRARI_W4_SW(m0_m, m1_m, m2_m, m3_m, DCT_CONST_BITS); \ 295 SRARI_W4_SW(m0_m, m1_m, m2_m, m3_m, DCT_CONST_BITS); \ 309 SRARI_W4_SW(m0_m, m1_m, m2_m, m3_m, DCT_CONST_BITS); \ [all...] |
idct4x4_msa.c | 92 out = ROUND_POWER_OF_TWO((input[0] * cospi_16_64), DCT_CONST_BITS); 93 out = ROUND_POWER_OF_TWO((out * cospi_16_64), DCT_CONST_BITS);
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/external/libvpx/libvpx/vpx_dsp/x86/ |
fwd_dct32x32_impl_avx2.h | 414 const __m256i s2_20_6 = _mm256_srai_epi32(s2_20_4, DCT_CONST_BITS); 415 const __m256i s2_20_7 = _mm256_srai_epi32(s2_20_5, DCT_CONST_BITS); 416 const __m256i s2_21_6 = _mm256_srai_epi32(s2_21_4, DCT_CONST_BITS); 417 const __m256i s2_21_7 = _mm256_srai_epi32(s2_21_5, DCT_CONST_BITS); 418 const __m256i s2_22_6 = _mm256_srai_epi32(s2_22_4, DCT_CONST_BITS); 419 const __m256i s2_22_7 = _mm256_srai_epi32(s2_22_5, DCT_CONST_BITS); 420 const __m256i s2_23_6 = _mm256_srai_epi32(s2_23_4, DCT_CONST_BITS); 421 const __m256i s2_23_7 = _mm256_srai_epi32(s2_23_5, DCT_CONST_BITS); 422 const __m256i s2_24_6 = _mm256_srai_epi32(s2_24_4, DCT_CONST_BITS); 423 const __m256i s2_24_7 = _mm256_srai_epi32(s2_24_5, DCT_CONST_BITS); [all...] |
inv_txfm_sse2.c | 94 v[0] = _mm_srai_epi32(u[0], DCT_CONST_BITS); 95 v[1] = _mm_srai_epi32(u[1], DCT_CONST_BITS); 96 v[2] = _mm_srai_epi32(u[2], DCT_CONST_BITS); 97 v[3] = _mm_srai_epi32(u[3], DCT_CONST_BITS); 148 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); 149 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); 150 u[2] = _mm_srai_epi32(v[2], DCT_CONST_BITS); 151 u[3] = _mm_srai_epi32(v[3], DCT_CONST_BITS); 169 tmp0 = _mm_srai_epi32(tmp0, DCT_CONST_BITS); \ 170 tmp1 = _mm_srai_epi32(tmp1, DCT_CONST_BITS); \ [all...] |
fwd_txfm_impl_sse2.h | 75 const int DCT_CONST_BITS2 = DCT_CONST_BITS + 2; 159 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); 160 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); 161 const __m128i w2 = _mm_srai_epi32(v2, DCT_CONST_BITS); 162 const __m128i w3 = _mm_srai_epi32(v3, DCT_CONST_BITS); 358 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); 359 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); 360 const __m128i w2 = _mm_srai_epi32(v2, DCT_CONST_BITS); 361 const __m128i w3 = _mm_srai_epi32(v3, DCT_CONST_BITS); 362 const __m128i w4 = _mm_srai_epi32(v4, DCT_CONST_BITS); [all...] |
fwd_dct32x32_impl_sse2.h | 436 const __m128i s2_20_6 = _mm_srai_epi32(s2_20_4, DCT_CONST_BITS); 437 const __m128i s2_20_7 = _mm_srai_epi32(s2_20_5, DCT_CONST_BITS); 438 const __m128i s2_21_6 = _mm_srai_epi32(s2_21_4, DCT_CONST_BITS); 439 const __m128i s2_21_7 = _mm_srai_epi32(s2_21_5, DCT_CONST_BITS); 440 const __m128i s2_22_6 = _mm_srai_epi32(s2_22_4, DCT_CONST_BITS); 441 const __m128i s2_22_7 = _mm_srai_epi32(s2_22_5, DCT_CONST_BITS); 442 const __m128i s2_23_6 = _mm_srai_epi32(s2_23_4, DCT_CONST_BITS); 443 const __m128i s2_23_7 = _mm_srai_epi32(s2_23_5, DCT_CONST_BITS); 444 const __m128i s2_24_6 = _mm_srai_epi32(s2_24_4, DCT_CONST_BITS); 445 const __m128i s2_24_7 = _mm_srai_epi32(s2_24_5, DCT_CONST_BITS); [all...] |
inv_txfm_sse2.h | 267 tmp0 = _mm_srai_epi32(tmp0, DCT_CONST_BITS); \ 268 tmp1 = _mm_srai_epi32(tmp1, DCT_CONST_BITS); \ 269 tmp2 = _mm_srai_epi32(tmp2, DCT_CONST_BITS); \ 270 tmp3 = _mm_srai_epi32(tmp3, DCT_CONST_BITS); \ 271 tmp4 = _mm_srai_epi32(tmp4, DCT_CONST_BITS); \ 272 tmp5 = _mm_srai_epi32(tmp5, DCT_CONST_BITS); \ 273 tmp6 = _mm_srai_epi32(tmp6, DCT_CONST_BITS); \ 274 tmp7 = _mm_srai_epi32(tmp7, DCT_CONST_BITS); \
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inv_txfm_ssse3.c | 116 tmp2 = _mm_srai_epi32(tmp2, DCT_CONST_BITS); 117 tmp3 = _mm_srai_epi32(tmp3, DCT_CONST_BITS); 118 tmp4 = _mm_srai_epi32(tmp4, DCT_CONST_BITS); 119 tmp5 = _mm_srai_epi32(tmp5, DCT_CONST_BITS); 169 tmp2 = _mm_srai_epi32(tmp2, DCT_CONST_BITS); 170 tmp3 = _mm_srai_epi32(tmp3, DCT_CONST_BITS); 171 tmp4 = _mm_srai_epi32(tmp4, DCT_CONST_BITS); 172 tmp5 = _mm_srai_epi32(tmp5, DCT_CONST_BITS); 279 tmp1 = _mm_srai_epi32(tmp1, DCT_CONST_BITS); 280 tmp2 = _mm_srai_epi32(tmp2, DCT_CONST_BITS); [all...] |
/external/libvpx/libvpx/vpx_dsp/arm/ |
fwd_txfm_neon.c | 64 const int16x4_t a = vrshrn_n_s32(v_t0_lo, DCT_CONST_BITS); 65 const int16x4_t b = vrshrn_n_s32(v_t0_hi, DCT_CONST_BITS); 66 const int16x4_t c = vrshrn_n_s32(v_t1_lo, DCT_CONST_BITS); 67 const int16x4_t d = vrshrn_n_s32(v_t1_hi, DCT_CONST_BITS); 68 const int16x4_t e = vrshrn_n_s32(v_t2_lo, DCT_CONST_BITS); 69 const int16x4_t f = vrshrn_n_s32(v_t2_hi, DCT_CONST_BITS); 70 const int16x4_t g = vrshrn_n_s32(v_t3_lo, DCT_CONST_BITS); 71 const int16x4_t h = vrshrn_n_s32(v_t3_hi, DCT_CONST_BITS); 85 const int16x4_t a = vrshrn_n_s32(v_t0_lo, DCT_CONST_BITS); 86 const int16x4_t b = vrshrn_n_s32(v_t0_hi, DCT_CONST_BITS); [all...] |
highbd_idct8x8_add_neon.c | 84 step1[4] = vrshrq_n_s32(step1[4], DCT_CONST_BITS); 85 step1[5] = vrshrq_n_s32(step1[5], DCT_CONST_BITS); 86 step1[6] = vrshrq_n_s32(step1[6], DCT_CONST_BITS); 87 step1[7] = vrshrq_n_s32(step1[7], DCT_CONST_BITS); 93 step2[1] = vrshrq_n_s32(step2[1], DCT_CONST_BITS); 94 step2[2] = vrshrq_n_s32(step2[2], DCT_CONST_BITS); 95 step2[3] = vrshrq_n_s32(step2[3], DCT_CONST_BITS); 111 step1[5] = vrshrq_n_s32(step1[5], DCT_CONST_BITS); 112 step1[6] = vrshrq_n_s32(step1[6], DCT_CONST_BITS); 156 t32[0] = vrshrn_n_s64(t64[0], DCT_CONST_BITS); [all...] |
highbd_idct4x4_add_neon.c | 84 b0 = vrshrq_n_s32(b0, DCT_CONST_BITS); 85 b1 = vrshrq_n_s32(b1, DCT_CONST_BITS); 86 b2 = vrshrq_n_s32(b2, DCT_CONST_BITS); 87 b3 = vrshrq_n_s32(b3, DCT_CONST_BITS); 121 b0 = vcombine_s32(vrshrn_n_s64(c0, DCT_CONST_BITS), 122 vrshrn_n_s64(c1, DCT_CONST_BITS)); 123 b1 = vcombine_s32(vrshrn_n_s64(c2, DCT_CONST_BITS), 124 vrshrn_n_s64(c3, DCT_CONST_BITS)); 125 b2 = vcombine_s32(vrshrn_n_s64(c4, DCT_CONST_BITS), 126 vrshrn_n_s64(c5, DCT_CONST_BITS)); [all...] |
fdct_neon.c | 57 int16x4_t out_0 = vrshrn_n_s32(temp1, DCT_CONST_BITS); 58 int16x4_t out_2 = vrshrn_n_s32(temp2, DCT_CONST_BITS); 71 int16x4_t out_1 = vrshrn_n_s32(temp3, DCT_CONST_BITS); 72 int16x4_t out_3 = vrshrn_n_s32(temp4, DCT_CONST_BITS);
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idct_neon.h | 81 // Multiply a by a_const. Saturate, shift and narrow by DCT_CONST_BITS. 84 // Shift by DCT_CONST_BITS + rounding will be within 16 bits for well formed 88 // becomes a right shift by DCT_CONST_BITS. 95 // Add a and b, then multiply by ab_const. Shift and narrow by DCT_CONST_BITS. 109 return vcombine_s16(vrshrn_n_s32(temp_low, DCT_CONST_BITS), 110 vrshrn_n_s32(temp_high, DCT_CONST_BITS)); 114 // DCT_CONST_BITS. 121 return vcombine_s16(vrshrn_n_s32(temp_low, DCT_CONST_BITS), 122 vrshrn_n_s32(temp_high, DCT_CONST_BITS)); 126 // DCT_CONST_BITS [all...] |
highbd_idct16x16_add_neon.c | 22 t32[0].val[0] = vrshrn_n_s64(t[0].val[0], DCT_CONST_BITS); 23 t32[0].val[1] = vrshrn_n_s64(t[0].val[1], DCT_CONST_BITS); 24 t32[1].val[0] = vrshrn_n_s64(t[1].val[0], DCT_CONST_BITS); 25 t32[1].val[1] = vrshrn_n_s64(t[1].val[1], DCT_CONST_BITS); 26 t32[2].val[0] = vrshrn_n_s64(t[2].val[0], DCT_CONST_BITS); 27 t32[2].val[1] = vrshrn_n_s64(t[2].val[1], DCT_CONST_BITS); 28 t32[3].val[0] = vrshrn_n_s64(t[3].val[0], DCT_CONST_BITS); 29 t32[3].val[1] = vrshrn_n_s64(t[3].val[1], DCT_CONST_BITS); 41 t32[0].val[0] = vrshrn_n_s64(t[0].val[0], DCT_CONST_BITS); 42 t32[0].val[1] = vrshrn_n_s64(t[0].val[1], DCT_CONST_BITS); [all...] |
highbd_idct32x32_1024_add_neon.c | 117 qOut0->val[0] = vcombine_s32(vrshrn_n_s64(q[0].val[0], DCT_CONST_BITS), 118 vrshrn_n_s64(q[0].val[1], DCT_CONST_BITS)); 119 qOut0->val[1] = vcombine_s32(vrshrn_n_s64(q[1].val[0], DCT_CONST_BITS), 120 vrshrn_n_s64(q[1].val[1], DCT_CONST_BITS)); 121 qOut1->val[0] = vcombine_s32(vrshrn_n_s64(q[2].val[0], DCT_CONST_BITS), 122 vrshrn_n_s64(q[2].val[1], DCT_CONST_BITS)); 123 qOut1->val[1] = vcombine_s32(vrshrn_n_s64(q[3].val[0], DCT_CONST_BITS), 124 vrshrn_n_s64(q[3].val[1], DCT_CONST_BITS));
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/external/libvpx/libvpx/vp9/encoder/mips/msa/ |
vp9_fdct_msa.h | 112 SRARI_W4_SW(in0_r_m, in1_r_m, s2_m, s3_m, DCT_CONST_BITS); \
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