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    Searched refs:EFI_MSR_SMRR_PHYS_MASK_VALID (Results 1 - 2 of 2) sorted by null

  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/SmmCpuFeaturesLib/
SmmCpuFeaturesLib.c 20 #define EFI_MSR_SMRR_PHYS_MASK_VALID BIT11
68 QNCPortWrite(QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QUARK_NC_HOST_BRIDGE_IA32_MTRR_SMRR_PHYSMASK, (~(CpuHotPlugData->SmrrSize - 1) & EFI_MSR_SMRR_MASK) | EFI_MSR_SMRR_PHYS_MASK_VALID);
222 QNCPortRead(QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QUARK_NC_HOST_BRIDGE_IA32_MTRR_SMRR_PHYSMASK) & ~EFI_MSR_SMRR_PHYS_MASK_VALID
242 QNCPortRead(QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QUARK_NC_HOST_BRIDGE_IA32_MTRR_SMRR_PHYSMASK) | EFI_MSR_SMRR_PHYS_MASK_VALID
  /device/linaro/bootloader/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/
SmmCpuFeaturesLib.c 35 #define EFI_MSR_SMRR_PHYS_MASK_VALID BIT11
242 // The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.
430 AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
445 AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
466 AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);

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