| /toolchain/binutils/binutils-2.25/include/opcode/ |
| tic6x-insn-formats.h | 34 #define FLD(name, pos, width) { CONCAT2(tic6x_field_,name), BFLD1(BFLD(pos, width, 0)) }
35 #define CFLDS FLD(p, 0, 1), FLD(creg, 29, 3), FLD(z, 28, 1)
43 #define NFLDS FLD(p, 0, 1)
56 #define SFLDS FLD(s, 0, 1)
71 CFLDS5(FLD(s, 1, 1), FLD(op, 7, 6), FLD(src1, 13, 5), FLD(src2, 18, 5)
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| epiphany-ibld.c | 45 #define FLD(f) (fields->f)
577 FLD (f_disp8) = ((((UINT) (FLD (f_disp11)) >> (3))) & (255));
578 FLD (f_disp3) = ((FLD (f_disp11)) & (7));
600 FLD (f_rd) = ((FLD (f_rd6)) & (7));
601 FLD (f_rd_x) = ((UINT) (FLD (f_rd6)) >> (3));
617 FLD (f_rm) = ((FLD (f_rm6)) & (7))
[all...] |
| m32c-ibld.c | 45 #define FLD(f) (fields->f)
587 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
588 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
634 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
635 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
648 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7))
[all...] |
| mep-ibld.c | 45 #define FLD(f) (fields->f)
574 FLD (f_24u8a4n_hi) = ((UINT) (FLD (f_24u8a4n)) >> (8));
575 FLD (f_24u8a4n_lo) = ((UINT) (((FLD (f_24u8a4n)) & (252))) >> (2));
588 FLD (f_c5_rm) = ((UINT) (FLD (f_c5_rmuimm20)) >> (16));
589 FLD (f_c5_16u16) = ((FLD (f_c5_rmuimm20)) & (65535));
602 FLD (f_c5_rnm) = ((UINT) (FLD (f_c5_rnmuimm24)) >> (16))
[all...] |
| iq2000-ibld.c | 45 #define FLD(f) (fields->f)
661 FLD (f_rd) = FLD (f_rd_rs);
662 FLD (f_rs) = FLD (f_rd_rs);
675 FLD (f_rd) = FLD (f_rd_rt);
676 FLD (f_rt) = FLD (f_rd_rt);
695 FLD (f_rt) = FLD (f_rt_rs)
[all...] |
| or1k-ibld.c | 45 #define FLD(f) (fields->f)
611 FLD (f_imm16_25_5) = ((((INT) (FLD (f_simm16_split)) >> (11))) & (31));
612 FLD (f_imm16_10_11) = ((FLD (f_simm16_split)) & (2047));
628 FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31));
629 FLD (f_imm16_10_11) = ((FLD (f_uimm16_split)) & (2047));
729 FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))))
[all...] |
| frv-ibld.c | 45 #define FLD(f) (fields->f)
768 FLD (f_labelH6) = ((SI) (((FLD (f_label24)) - (pc))) >> (20));
769 FLD (f_labelL18) = ((((UINT) (((FLD (f_label24)) - (pc))) >> (2))) & (262143));
815 FLD (f_spr_h) = ((UINT) (FLD (f_spr)) >> (6));
816 FLD (f_spr_l) = ((FLD (f_spr)) & (63));
829 FLD (f_u12_h) = ((SI) (FLD (f_u12)) >> (6))
[all...] |
| fr30-ibld.c | 45 #define FLD(f) (fields->f)
644 FLD (f_i20_4) = ((UINT) (FLD (f_i20)) >> (16));
645 FLD (f_i20_16) = ((FLD (f_i20)) & (65535));
850 FLD (f_i20) = ((((FLD (f_i20_4)) << (16))) | (FLD (f_i20_16)));
[all...] |
| xstormy16-ibld.c | 45 #define FLD(f) (fields->f)
592 FLD (f_abs24_1) = ((FLD (f_abs24)) & (255));
593 FLD (f_abs24_2) = ((UINT) (FLD (f_abs24)) >> (8));
741 FLD (f_abs24) = ((((FLD (f_abs24_2)) << (8))) | (FLD (f_abs24_1)));
[all...] |
| cgen-ibld.in | 45 #define FLD(f) (fields->f)
|
| ip2k-ibld.c | 45 #define FLD(f) (fields->f)
|
| lm32-ibld.c | 45 #define FLD(f) (fields->f)
|
| m32r-ibld.c | 45 #define FLD(f) (fields->f)
[all...] |
| nds32-asm.c | 1947 const field_t *fld = &LEX_GET_FIELD (syn); local
[all...] |
| mt-ibld.c | 45 #define FLD(f) (fields->f)
[all...] |
| xc16x-ibld.c | 45 #define FLD(f) (fields->f)
[all...] |
| /external/pcre/dist2/src/ |
| pcre2test.c | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.h | 354 /// FLD - This instruction implements an extending load to FP stack slots.
358 FLD,
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| gnu.go | 330 if (inst.Op == FLD || inst.Op == FSTP) && isMem(inst.Args[0]) {
914 case FADD, FCOM, FCOMP, FDIV, FDIVR, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FIST, FISTP, FISTTP, FISUB, FISUBR, FLD, FMUL, FST, FSTP, FSUB, FSUBR:
|
| intel.go | 295 case FLD, FXCH, FCOM, FCOMP, FIADD, FIMUL, FICOM, FICOMP, FISUBR, FIDIV, FUCOM, FUCOMP, FILD, FBLD, FADD, FMUL, FSUB, FSUBR, FISUB, FDIV, FDIVR, FIDIVR:
|
| tables.go | [all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| gnu.go | 330 if (inst.Op == FLD || inst.Op == FSTP) && isMem(inst.Args[0]) {
914 case FADD, FCOM, FCOMP, FDIV, FDIVR, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FIST, FISTP, FISTTP, FISUB, FISUBR, FLD, FMUL, FST, FSTP, FSUB, FSUBR:
|
| intel.go | 295 case FLD, FXCH, FCOM, FCOMP, FIADD, FIMUL, FICOM, FICOMP, FISUBR, FIDIV, FUCOM, FUCOMP, FILD, FBLD, FADD, FMUL, FSUB, FSUBR, FISUB, FDIV, FDIVR, FIDIVR:
|
| tables.go | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 580 FLD,
[all...] |
