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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
mips32r2-fp32.s 6 # FPU (cp1) instructions
8 # Even registers are supported w/ 32-bit FPU, odd
9 # registers supported only for 64-bit FPU.
10 # Only the 32-bit FPU instructions are tested here.
attr-gnu-4-5.d 9 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
17 FP ABI: Hard float \(32-bit CPU, Any FPU\)
attr-gnu-4-6.d 9 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
17 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-7.d 9 Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
17 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
attr-none-o32-fp64-nooddspreg.d 9 Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
17 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
attr-none-o32-fp64.d 9 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
17 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-none-o32-fpxx.d 9 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
17 FP ABI: Hard float \(32-bit CPU, Any FPU\)
module-check.d 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
15 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
module-mfp64-noodd.d 7 Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
15 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
module-mfp64.d 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
15 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
module-mfpxx.d 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
15 FP ABI: Hard float \(32-bit CPU, Any FPU\)
module-set-mfpxx.d 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
15 FP ABI: Hard float \(32-bit CPU, Any FPU\)
r6-attr-none-double.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
  /external/llvm/test/MC/Mips/
update-module-level-options.s 6 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
14 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
set-oddspreg-nooddspreg-error.s 6 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/
attr-gnu-4-05.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
16 FP ABI: Hard float \(32-bit CPU, Any FPU\)
attr-gnu-4-06.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-07.d 8 Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-44.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
16 FP ABI: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
attr-gnu-4-55.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
16 FP ABI: Hard float \(32-bit CPU, Any FPU\)
attr-gnu-4-56.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-57.d 8 Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-65.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-66.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
attr-gnu-4-67.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
16 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)

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