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Searched
refs:GPR32RegClass
(Results
1 - 17
of
17
) sorted by null
/external/llvm/lib/Target/Mips/
MipsMachineFunction.cpp
52
: &Mips::
GPR32RegClass
;
61
: &Mips::
GPR32RegClass
;
73
const TargetRegisterClass *RC = &Mips::
GPR32RegClass
;
MipsOptionRecord.h
46
GPR32RegClass
= &(TRI->getRegClass(Mips::GPR32RegClassID));
64
const MCRegisterClass *
GPR32RegClass
;
MipsFastISel.cpp
279
unsigned ResultReg = createResultReg(&Mips::
GPR32RegClass
);
298
unsigned ResultReg = createResultReg(&Mips::
GPR32RegClass
);
312
const TargetRegisterClass *RC = &Mips::
GPR32RegClass
;
349
unsigned TempReg = materialize32BitInt(Imm, &Mips::
GPR32RegClass
);
355
unsigned TempReg1 = materialize32BitInt(Imm >> 32, &Mips::
GPR32RegClass
);
357
materialize32BitInt(Imm & 0xFFFFFFFF, &Mips::
GPR32RegClass
);
368
const TargetRegisterClass *RC = &Mips::
GPR32RegClass
;
390
const TargetRegisterClass *RC = &Mips::
GPR32RegClass
;
610
unsigned TempReg = createResultReg(&Mips::
GPR32RegClass
);
616
unsigned TempReg = createResultReg(&Mips::
GPR32RegClass
);
[
all
...]
MipsSERegisterInfo.cpp
57
return &Mips::
GPR32RegClass
;
180
ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
MipsSubtarget.cpp
139
&Mips::GPR64RegClass : &Mips::
GPR32RegClass
);
MipsSEFrameLowering.cpp
293
const TargetRegisterClass *RC = &Mips::
GPR32RegClass
;
358
const TargetRegisterClass *RC2 = &Mips::
GPR32RegClass
;
396
&Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
567
const TargetRegisterClass *PtrRC = &Mips::
GPR32RegClass
;
696
ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
731
const TargetRegisterClass *PtrRC = &Mips::
GPR32RegClass
;
[
all
...]
MipsSEInstrInfo.cpp
86
if (Mips::
GPR32RegClass
.contains(DestReg)) { // Copy to CPU Reg.
87
if (Mips::
GPR32RegClass
.contains(SrcReg)) {
114
else if (Mips::
GPR32RegClass
.contains(SrcReg)) { // Copy from CPU Reg.
192
if (Mips::
GPR32RegClass
.hasSubClassEq(RC))
265
if (Mips::
GPR32RegClass
.hasSubClassEq(RC))
477
&Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
Mips16InstrInfo.cpp
66
Mips::
GPR32RegClass
.contains(SrcReg))
68
else if (Mips::
GPR32RegClass
.contains(DestReg) &&
MipsRegisterInfo.cpp
57
return ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
MipsAsmPrinter.cpp
257
unsigned CPURegSize = Mips::
GPR32RegClass
.getSize();
276
} else if (Mips::
GPR32RegClass
.contains(Reg))
[
all
...]
MipsSEISelDAGToDAG.cpp
144
RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::
GPR32RegClass
;
[
all
...]
MipsSEISelLowering.cpp
42
addRegisterClass(MVT::i32, &Mips::
GPR32RegClass
);
[
all
...]
MipsISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/Mips/MCTargetDesc/
MipsOptionRecord.cpp
79
if (
GPR32RegClass
->contains(CurrentSubReg) ||
/external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp
344
: &AArch64::
GPR32RegClass
;
377
&AArch64::GPR64RegClass : &AArch64::
GPR32RegClass
;
[
all
...]
AArch64InstrInfo.cpp
498
} else if (MRI.constrainRegClass(DstReg, &AArch64::
GPR32RegClass
)) {
499
RC = &AArch64::
GPR32RegClass
;
[
all
...]
AArch64ISelLowering.cpp
[
all
...]
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