| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 321 Imm64 = 7 << ImmShift,
436 case X86II::Imm64: return 8;
452 case X86II::Imm64:
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 411 Imm64 = 8 << ImmShift,
584 case X86II::Imm64: return 8;
601 case X86II::Imm64:
619 case X86II::Imm64:
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i386-opc.h | 657 Imm64,
767 unsigned int imm64:1; member in struct:i386_operand_type::__anon116489
|
| i386-gen.c | 275 "Imm64" },
341 "Imm32|Imm64" },
345 "Imm64|Disp64" },
347 "Imm32|Imm32S|Imm64|Disp32" },
349 "Imm32|Imm32S|Imm64|Disp32|Disp64" },
540 BITFIELD (Imm64),
[all...] |
| /external/valgrind/VEX/priv/ |
| host_amd64_defs.c | 589 AMD64Instr* AMD64Instr_Imm64 ( ULong imm64, HReg dst ) {
592 i->Ain.Imm64.imm64 = imm64;
593 i->Ain.Imm64.dst = dst;
4119 ULong imm64 = (ULong)(Addr)location_of_counter; local
[all...] |
| host_amd64_defs.h | 418 ULong imm64; member in struct:__anon36416::__anon36417::__anon36418
420 } Imm64;
722 extern AMD64Instr* AMD64Instr_Imm64 ( ULong imm64, HReg dst );
|
| host_arm64_defs.c | [all...] |
| host_arm64_defs.h | 579 ULong imm64; member in struct:__anon36504::__anon36505::__anon36513
580 } Imm64;
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerX86BaseImpl.h | 319 AssemblerX86Base<TraitsType>::movabs(const GPRRegister Dst, uint64_t Imm64) {
321 const bool NeedsRexW = (Imm64 & ~0xFFFFFFFFull) != 0;
325 // When emitting Imm64, we don't have to mask out the upper 32 bits for
328 emitInt32(Imm64 & 0xFFFFFFFF);
330 emitInt32((Imm64 >> 32) & 0xFFFFFFFF);
[all...] |
| IceAssemblerX86Base.h | 311 uint64_t Imm64);
[all...] |
