| /external/vixl/examples/aarch64/ |
| custom-disassembler.cc | 41 AppendToOutput(reg.Is64Bits() ? "ip0" : "wip0");
44 AppendToOutput(reg.Is64Bits() ? "ip1" : "wip1");
47 AppendToOutput(reg.Is64Bits() ? "lr" : "w30");
50 AppendToOutput(reg.Is64Bits() ? "x_stack_pointer" : "w_stack_pointer");
53 AppendToOutput(reg.Is64Bits() ? "x_zero_reg" : "w_zero_reg");
|
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 306 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize));
322 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
362 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_);
384 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
399 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
404 VIXL_ASSERT(regoffset.Is64Bits() || (extend != SXTX));
419 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
420 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP());
432 VIXL_ASSERT(base.Is64Bits() && !base.IsZero());
447 VIXL_ASSERT(regoffset_.Is64Bits() && !regoffset_.IsSP())
[all...] |
| assembler-aarch64.cc | 181 VIXL_ASSERT(xn.Is64Bits());
187 VIXL_ASSERT(xn.Is64Bits());
193 VIXL_ASSERT(xn.Is64Bits());
352 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize)));
365 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize)));
378 VIXL_ASSERT(xd.Is64Bits());
389 VIXL_ASSERT(xd.Is64Bits());
606 VIXL_ASSERT(rd.Is64Bits() || rn.Is32Bits());
763 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && xm.Is64Bits());
795 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && xm.Is64Bits());
[all...] |
| operands-aarch64.h | 121 bool Is64Bits() const {
195 bool IsX() const { return IsValidRegister() && Is64Bits(); }
207 bool IsD() const { return IsV() && Is64Bits(); }
370 bool Is8B() const { return (Is64Bits() && (lanes_ == 8)); }
372 bool Is4H() const { return (Is64Bits() && (lanes_ == 4)); }
374 bool Is2S() const { return (Is64Bits() && (lanes_ == 2)); }
376 bool Is1D() const { return (Is64Bits() && (lanes_ == 1)); }
|
| macro-assembler-aarch64.cc | 405 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm) || rd.Is64Bits());
513 masm->movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask));
789 VIXL_ASSERT(rd.Is64Bits() || IsUint32(immediate));
809 } else if ((rd.Is64Bits() && (immediate == -1)) ||
854 operand.GetRegister().Is64Bits() ||
908 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1);
943 movi(vd.Is64Bits() ? vd.V1D() : vd.V2D(), ((imm << 32) | imm));
990 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff);
1023 Movi32bitHelper(vd.Is64Bits() ? vd.V2S() : vd.V4S(), imm & 0xffffffff);
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 67 inline bool CPURegister::Is64Bits() const {
335 DCHECK(reg.Is64Bits() || (shift_amount < kWRegSizeInBits));
352 DCHECK(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
383 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_);
426 DCHECK(smi.Is64Bits());
434 DCHECK(smi.Is64Bits());
454 DCHECK(base.Is64Bits() && !base.IsZero());
464 DCHECK(base.Is64Bits() && !base.IsZero());
469 DCHECK(regoffset.Is64Bits() || (extend != SXTX));
479 DCHECK(base.Is64Bits() && !base.IsZero())
[all...] |
| assembler-arm64.cc | 978 DCHECK(xn.Is64Bits());
984 DCHECK(xn.Is64Bits());
993 DCHECK(xn.Is64Bits());
[all...] |
| code-stubs-arm64.h | 81 DCHECK(object.Is64Bits());
82 DCHECK(value.Is64Bits());
83 DCHECK(address.Is64Bits());
|
| macro-assembler-arm64-inl.h | 460 DCHECK(!rd.IsSP() && rd.Is64Bits());
473 DCHECK(rd.Is64Bits() && rn.Is64Bits());
726 if (!fd.Is(fn) || !fd.Is64Bits()) {
745 DCHECK(fd.Is64Bits());
758 if (fd.Is64Bits()) {
896 DCHECK(rt.Is64Bits());
962 if (!rd.Is(rn) || !rd.Is64Bits()) {
[all...] |
| codegen-arm64.cc | 101 DCHECK(string.Is64Bits() && index.Is32Bits() && result.Is64Bits());
|
| macro-assembler-arm64.cc | 84 DCHECK(rd.Is64Bits() || is_uint32(immediate));
102 } else if ((rd.Is64Bits() && (immediate == -1L)) ||
146 DCHECK(operand.reg().Is64Bits() ||
163 DCHECK(is_uint32(imm) || is_int32(imm) || rd.Is64Bits());
427 movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask));
480 if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() &&
548 DCHECK(operand.reg().Is64Bits() ||
643 DCHECK(rt.Is64Bits());
661 DCHECK(rt.Is64Bits());
[all...] |
| /external/llvm/tools/llvm-objdump/ |
| ELFDump.cpp | 54 const char *Fmt = ELFT::Is64Bits ? "0x%016" PRIx64 " " : "0x%08" PRIx64 " ";
|
| /art/disassembler/ |
| disassembler_arm64.cc | 47 if (reg.IsRegister() && reg.Is64Bits()) {
|
| /external/vixl/test/aarch64/ |
| test-utils-aarch64.cc | 151 VIXL_ASSERT(reg.Is64Bits());
190 VIXL_ASSERT(fpreg.Is64Bits());
198 VIXL_ASSERT(reg0.Is64Bits() && reg1.Is64Bits());
208 VIXL_ASSERT(vreg.Is64Bits());
|
| /external/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
140 LLVM_ELF_IMPORT_TYPES(ELFT::TargetEndianness, ELFT::Is64Bits)
365 typedef typename std::conditional<ELFT::Is64Bits,
367 typedef typename std::conditional<ELFT::Is64Bits,
|
| MachO.h | 197 create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits);
445 MachOObjectFile(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Object/ |
| ELFTypes.h | 46 static const bool Is64Bits = Is64;
88 // Templates to choose Elf_Addr and Elf_Off depending on is64Bits.
364 typedef typename std::conditional<ELFT::Is64Bits,
366 typedef typename std::conditional<ELFT::Is64Bits,
|
| /external/llvm/tools/llvm-readobj/ |
| ELFDumper.cpp | [all...] |
