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  /external/vixl/src/aarch64/
cpu-aarch64.cc 68 VIXL_ASSERT(IsUint32(cache_type_register));
macro-assembler-aarch64.cc 405 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm) || rd.Is64Bits());
789 VIXL_ASSERT(rd.Is64Bits() || IsUint32(immediate));
927 VIXL_ASSERT(IsUint32(imm));
    [all...]
  /external/vixl/src/aarch32/
operands-aarch32.h 143 VIXL_ASSERT(IsInt32(immediate) || IsUint32(immediate));
150 VIXL_ASSERT(IsUint32(address_as_integral));
  /external/vixl/test/aarch32/
test-simulator-cond-rd-operand-const-a32.cc 506 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-operand-const-t32.cc 621 VIXL_ASSERT(IsUint32(input_stride));
    [all...]
test-simulator-cond-rd-operand-imm16-t32.cc 459 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-operand-rn-a32.cc 636 VIXL_ASSERT(IsUint32(input_stride));
    [all...]
test-simulator-cond-rd-operand-rn-ror-amount-a32.cc     [all...]
test-simulator-cond-rd-operand-rn-ror-amount-t32.cc     [all...]
test-simulator-cond-rd-operand-rn-t32.cc 636 VIXL_ASSERT(IsUint32(input_stride));
    [all...]
test-simulator-rd-rn-rm-a32.cc     [all...]
test-simulator-rd-rn-rm-t32.cc     [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc     [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc     [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc     [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc     [all...]
test-simulator-cond-rd-rn-rm-a32-ge.cc 439 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-rn-rm-a32-q.cc 423 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-rn-rm-a32-sel.cc 416 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-rn-rm-t32-ge.cc 439 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-rn-rm-t32-q.cc 423 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rd-rn-rm-t32-sel.cc 416 VIXL_ASSERT(IsUint32(input_stride));
test-simulator-cond-rdlow-operand-imm8-t32.cc     [all...]
test-simulator-cond-rd-rn-operand-imm12-t32.cc     [all...]
test-simulator-cond-rd-rn-operand-rm-a32.cc     [all...]

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