| /external/llvm/unittests/MI/ |
| LiveIntervalTest.cpp | 91 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
92 T(MF, LIS);
111 static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS,
128 LIS.handleMove(*FromInstr, true);
171 [](MachineFunction &MF, LiveIntervals &LIS) {
172 testHandleMove(MF, LIS, 2, 1);
182 [](MachineFunction &MF, LiveIntervals &LIS) {
183 testHandleMove(MF, LIS, 2, 1);
193 [](MachineFunction &MF, LiveIntervals &LIS) {
194 testHandleMove(MF, LIS, 2, 1)
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyOptimizeLiveIntervals.cpp | 71 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
86 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
97 LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg());
98 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot());
99 LIS.RemoveMachineInstrFromMaps(*MI);
|
| WebAssemblyStoreResults.cpp | 82 LiveIntervals &LIS) {
85 LiveInterval *FromLI = &LIS.getInterval(FromReg);
86 LiveInterval *ToLI = &LIS.getInterval(ToReg);
88 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot();
102 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where);
127 LIS.extendToIndices(*ToLI, Indices);
130 LIS.shrinkToUses(FromLI);
145 LiveIntervals &LIS) {
148 return ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS);
154 LiveIntervals &LIS,
[all...] |
| WebAssemblyRegStackify.cpp | 229 const LiveIntervals &LIS)
235 // MRI doesn't know what the Def is. Try asking LIS.
236 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore(
237 LIS.getInstructionIndex(*Insert)))
238 return LIS.getInstructionFromIndex(ValNo->def);
248 LiveIntervals &LIS) {
254 const LiveInterval &LI = LIS.getInterval(Reg);
256 LIS.getInstructionIndex(*Def).getRegSlot());
259 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent()));
277 AliasAnalysis &AA, const LiveIntervals &LIS,
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 54 LiveIntervals &LIS;
62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 44 LiveIntervals &LIS;
48 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
50 MF(mf), LIS(lis), Loops(loops) {}
|
| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 39 LiveInterval &LI = LIS.createEmptyInterval(VReg);
67 LiveInterval &OrigLI = LIS.getInterval(Original);
69 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def);
102 LiveInterval &li = LIS.getInterval(MO.getReg());
130 DefIdx = LIS.getInstructionIndex(*RM.OrigMI);
156 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot();
161 LIS.removeInterval(Reg);
191 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI),
192 LIS.getInstructionIndex(*UseMI)))
208 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS);
[all...] |
| RegAllocBase.cpp | 55 LiveIntervals &lis,
60 LIS = &lis;
75 enqueue(&LIS->getInterval(Reg));
92 LIS->removeInterval(VirtReg->reg);
137 LiveInterval *SplitVirtReg = &LIS->getInterval(*I);
142 LIS->removeInterval(SplitVirtReg->reg);
157 LIS->RemoveMachineInstrFromMaps(*DeadInst);
|
| RegAllocBase.h | 64 LiveIntervals *LIS;
75 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
80 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
|
| PHIElimination.cpp | 57 LiveIntervals *LIS;
135 LIS = getAnalysisIfAvailable<LiveIntervals>();
144 if (!DisableEdgeSplitting && (LV || LIS)) {
161 if (LIS)
162 LIS->RemoveMachineInstrFromMaps(*DefMI);
169 if (LIS)
170 LIS->RemoveMachineInstrFromMaps(*I.first);
310 if (LIS) {
312 LIS->InsertMachineInstrInMaps(*std::prev(AfterPHIsIt));
314 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB)
[all...] |
| CalcSpillWeights.cpp | 26 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS,
36 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm);
41 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg));
78 const LiveIntervals &LIS,
91 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
113 const LiveInterval &SrcLI = LIS.getInterval(Reg);
119 MI = LIS.getInstructionFromIndex(VNI->def);
124 if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis()))
176 if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
222 if (li.isZeroLength(LIS.getSlotIndexes()) &
[all...] |
| LiveDebugVariables.cpp | 134 LiveIntervals &LIS, const TargetInstrInfo &TII);
139 LiveIntervals &LIS);
233 /// @param LIS Live intervals analysis.
238 LiveIntervals &LIS, MachineDominatorTree &MDT,
252 LiveIntervals &LIS);
257 LiveIntervals &LIS, MachineDominatorTree &MDT,
263 LiveIntervals &LIS);
271 LiveIntervals &LIS, const TargetInstrInfo &TRI);
285 LiveIntervals *LIS;
525 ? LIS->getMBBStartIdx(MBB
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveRangeEdit.cpp | 33 LiveIntervals &LIS,
39 LiveInterval &LI = LIS.getOrCreateInterval(VReg);
56 void LiveRangeEdit::scanRemattable(LiveIntervals &lis,
64 MachineInstr *DefMI = lis.getInstructionFromIndex(VNI->def);
72 bool LiveRangeEdit::anyRematerializable(LiveIntervals &lis,
76 scanRemattable(lis, tii, aa);
85 LiveIntervals &lis) {
93 if (MO.isUndef() || !lis.hasInterval(MO.getReg()))
101 LiveInterval &li = lis.getInterval(MO.getReg());
114 LiveIntervals &lis) {
[all...] |
| RegisterCoalescer.cpp | 87 LiveIntervals *LIS;
419 if (!LIS->hasInterval(CP.getDstReg()))
423 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
425 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg());
426 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getDefIndex();
482 LIS->getInstructionFromIndex(ValLR->end.getPrevSlot());
496 if (LIS->hasInterval(*AS) && IntA.overlaps(LIS->getInterval(*AS))) {
499 LIS->getInterval(*AS).print(dbgs(), TRI);
526 if (!LIS->hasInterval(*SR)
[all...] |
| InlineSpiller.cpp | 56 LiveIntervals &LIS;
141 LIS(pass.getAnalysis<LiveIntervals>()),
234 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI))
284 LiveInterval &SnipLI = LIS.getInterval(SnipReg);
370 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def);
388 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def);
528 LiveInterval &LI = LIS.getInterval(Reg);
529 LiveInterval &OrigLI = LIS.getInterval(Original);
574 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
580 LiveInterval &SrcLI = LIS.getInterval(SrcReg)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXFMAMutate.cpp | 66 LiveIntervals *LIS;
108 SlotIndex FMAIdx = LIS->getInstructionIndex(*MI);
111 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn();
117 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def);
191 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill()
195 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill()
212 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx))
280 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg);
298 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg);
307 LIS->getVNInfoAllocator())
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SILoadStoreOptimizer.cpp | 63 LiveIntervals *LIS;
87 LIS(nullptr) {}
256 LIS->InsertMachineInstrInMaps(*Read2);
260 SlotIndex PairedIndex = LIS->getInstructionIndex(*Paired);
261 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI));
267 LIS->ReplaceMachineInstrInMaps(*I, *Copy0);
268 LIS->ReplaceMachineInstrInMaps(*Paired, *Copy1);
273 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg());
274 LIS->shrinkToUses(&AddrRegLI);
276 LIS->createAndComputeVirtRegInterval(DestReg)
[all...] |
