| /external/vixl/examples/aarch64/ |
| getting-started.cc | 36 __ Ldr(x1, 0x1122334455667788);
|
| literal.cc | 53 __ Ldr(x1, &manually_placed_literal);
54 __ Ldr(x2, &automatically_placed_literal);
|
| /external/v8/src/builtins/arm64/ |
| builtins-arm64.cc | 49 __ Ldr(cp, FieldMemOperand(x1, JSFunction::kContextOffset));
79 __ Ldr(x10, FieldMemOperand(x1, JSFunction::kPrototypeOrInitialMapOffset));
106 __ Ldr(x10, FieldMemOperand(x1, JSFunction::kPrototypeOrInitialMapOffset));
139 __ Ldr(d5, FieldMemOperand(x5, HeapNumber::kValueOffset));
176 __ Ldr(d5, FieldMemOperand(x5, HeapNumber::kValueOffset));
184 __ Ldr(d2, FieldMemOperand(x2, HeapNumber::kValueOffset));
232 __ Ldr(x0, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
270 __ Ldr(cp, FieldMemOperand(x1, JSFunction::kContextOffset));
278 __ Ldr(x2, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
355 __ Ldr(x0, MemOperand(jssp, x0, LSL, kPointerSizeLog2))
[all...] |
| /external/v8/src/arm64/ |
| deoptimizer-arm64.cc | 135 __ Ldr(x1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
137 __ Ldr(x0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
156 __ Ldr(x1, MemOperand(deoptimizer, Deoptimizer::input_offset()));
185 __ Ldr(unwind_limit, MemOperand(x1, FrameDescription::frame_size_offset()));
213 __ Ldr(__ StackPointer(),
220 __ Ldr(x0, MemOperand(x4, Deoptimizer::output_offset()));
226 __ Ldr(current_frame, MemOperand(x0, 0));
227 __ Ldr(x3, MemOperand(current_frame, FrameDescription::frame_size_offset()));
233 __ Ldr(x7, MemOperand(x6, FrameDescription::frame_content_offset()));
243 __ Ldr(x1, MemOperand(x4, Deoptimizer::input_offset()))
[all...] |
| codegen-arm64.cc | 106 __ Ldr(result, FieldMemOperand(string, HeapObject::kMapOffset));
122 __ Ldr(result.W(),
124 __ Ldr(string, FieldMemOperand(string, SlicedString::kParentOffset));
130 __ Ldr(string, FieldMemOperand(string, ThinString::kActualOffset));
139 __ Ldr(result, FieldMemOperand(string, ConsString::kSecondOffset));
142 __ Ldr(string, FieldMemOperand(string, ConsString::kFirstOffset));
172 __ Ldr(string, FieldMemOperand(string, ExternalString::kResourceDataOffset));
|
| code-stubs-arm64.cc | 86 __ Ldr(double_scratch, MemOperand(input, double_offset));
92 __ Ldr(result, MemOperand(input, double_offset));
214 __ Ldr(double_scratch, FieldMemOperand(right, HeapNumber::kValueOffset));
325 __ Ldr(right_d, FieldMemOperand(right, HeapNumber::kValueOffset));
350 __ Ldr(left_d, FieldMemOperand(left, HeapNumber::kValueOffset));
510 __ Ldr(rhs_map, FieldMemOperand(rhs, HeapObject::kMapOffset));
511 __ Ldr(lhs_map, FieldMemOperand(lhs, HeapObject::kMapOffset));
535 __ Ldr(lhs_d, FieldMemOperand(lhs, HeapNumber::kValueOffset));
536 __ Ldr(rhs_d, FieldMemOperand(rhs, HeapNumber::kValueOffset));
699 __ Ldr(exponent_double
[all...] |
| macro-assembler-arm64.cc | 63 Ldr(temp, operand.immediate());
252 Ldr(dst, operand.immediate());
300 Ldr(rd, operand.immediate());
357 Ldr(temp, operand.immediate());
489 Ldr(temp, operand.immediate());
521 Ldr(temp, operand.immediate());
641 Ldr(rt.W(), addr);
644 Ldr(rt, addr);
[all...] |
| /external/vixl/examples/aarch32/ |
| getting-started.cc | 35 __ Ldr(r1, 0x12345678);
|
| /external/v8/src/ic/arm64/ |
| handler-compiler-arm64.cc | 63 __ Ldr(map, FieldMemOperand(receiver, HeapObject::kMapOffset));
75 __ Ldr(properties, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
77 __ Ldr(map, FieldMemOperand(properties, HeapObject::kMapOffset));
98 __ Ldr(scratch, FieldMemOperand(scratch, PropertyCell::kValueOffset));
159 __ Ldr(holder, FieldMemOperand(receiver, HeapObject::kMapOffset));
160 __ Ldr(holder, FieldMemOperand(holder, Map::kPrototypeOffset));
162 __ Ldr(holder, FieldMemOperand(holder, HeapObject::kMapOffset));
163 __ Ldr(holder, FieldMemOperand(holder, Map::kPrototypeOffset));
180 __ Ldr(data,
182 __ Ldr(data
[all...] |
| /external/v8/src/debug/arm64/ |
| debug-arm64.cc | 59 // ldr ip0, [pc, #(2 * kInstructionSize)]
144 __ Ldr(x1, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
149 __ Ldr(x0, FieldMemOperand(x1, JSFunction::kSharedFunctionInfoOffset));
150 __ Ldr(x0,
|
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 59 ___ Ldr(reg_x(dst.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value()));
70 ___ Ldr(reg_x(scratch.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value()));
117 ___ Ldr(dst0, MemOperand(sp, offset));
131 ___ Ldr(dst0, MemOperand(sp, offset));
|
| jni_macro_assembler_arm64.cc | 232 ___ Ldr(reg_w(dest), MEM_OP(reg_x(base), offset));
243 ___ Ldr(reg_x(dest), MEM_OP(reg_x(base), offset));
247 ___ Ldr(reg_s(dest), MEM_OP(reg_x(base), offset));
251 ___ Ldr(reg_d(dest), MEM_OP(reg_x(base), offset));
262 ___ Ldr(reg_w(dest.AsWRegister()), MEM_OP(reg_x(base), offset));
269 ___ Ldr(reg_w(dest.AsOverlappingWRegister()), MEM_OP(reg_x(base), offset));
272 ___ Ldr(reg_x(dest.AsXRegister()), MEM_OP(reg_x(base), offset));
275 ___ Ldr(reg_s(dest.AsSRegister()), MEM_OP(reg_x(base), offset));
278 ___ Ldr(reg_d(dest.AsDRegister()), MEM_OP(reg_x(base), offset));
322 ___ Ldr(reg_x(dst.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value()))
[all...] |
| /external/v8/src/crankshaft/arm64/ |
| delayed-masm-arm64.cc | 29 __ Ldr(temp1, pending_address_src_);
30 __ Ldr(temp2, src_operand);
178 __ Ldr(pending_register_, pending_address_src_);
186 __ Ldr(temp, pending_address_src_);
|
| lithium-codegen-arm64.cc | 449 __ Ldr(cp, ToMemOperand(context, kMustUseFramePointer));
654 __ Ldr(value, MemOperand(fp, parameter_offset));
882 __ Ldr(w1, MemOperand(x0));
[all...] |
| /external/vixl/test/aarch32/ |
| test-disasm-a32.cc | 643 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xfff123)),
646 "ldr r0, [r0, #291]\n"); // #0x123
647 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xff123)),
649 "ldr r0, [r0, #291]\n"); // #0x123
650 COMPARE_BOTH(Ldr(r0, MemOperand(r1, -0xff123)),
652 "ldr r0, [r0, #3805]\n"); // #0xedd
654 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xfff123, PreIndex)),
657 "ldr r0, [r1, #291]!\n"); // #0x123
658 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xff123, PreIndex)),
660 "ldr r0, [r1, #291]!\n"); // #0x12
[all...] |
| /art/compiler/trampolines/ |
| trampoline_compiler.cc | 68 ___ Ldr(pc, MemOperand(r0, offset.Int32Value()));
76 ___ Ldr(temp_reg, MemOperand(r0, JNIEnvExt::SelfOffset(4).Int32Value()));
77 ___ Ldr(pc, MemOperand(temp_reg, offset.Int32Value()));
81 ___ Ldr(pc, MemOperand(tr, offset.Int32Value()));
|
| /art/compiler/optimizing/ |
| intrinsics_arm_vixl.cc | 206 __ Ldr(tmp, MemOperand(src_curr_addr, element_size, PostIndex));
[all...] |
| intrinsics_arm64.cc | 185 __ Ldr(tmp_reg, MemOperand(src_curr_addr, element_size, PostIndex));
770 __ Ldr(WRegisterFrom(invoke->GetLocations()->Out()),
780 __ Ldr(XRegisterFrom(invoke->GetLocations()->Out()),
[all...] |
| code_generator_arm64.cc | 88 // Reference load (except object array loads) is using LDR Wt, [Xn, #offset] which can handle
[all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AsmPrinter.cpp | 510 /// ldr x1, [x0, #:tlsdesc_lo12:var]
531 MCInst Ldr;
532 Ldr.setOpcode(AArch64::LDRXui);
533 Ldr.addOperand(MCOperand::createReg(AArch64::X1));
534 Ldr.addOperand(MCOperand::createReg(AArch64::X0));
535 Ldr.addOperand(SymTLSDescLo12);
536 Ldr.addOperand(MCOperand::createImm(0));
537 EmitToStreamer(*OutStreamer, Ldr);
|
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 438 __ Ldr(result, MemOperand(buffer, offset, UXTW)); \
558 __ Ldr(lr, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
559 __ Ldr(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
572 __ Ldr(scratch1, MemOperand(fp, StandardFrameConstants::kContextOffset));
580 __ Ldr(caller_args_count_reg,
645 __ Ldr(jssp, MemOperand(csp));
690 __ Ldr(temp, FieldMemOperand(func, JSFunction::kContextOffset));
694 __ Ldr(x10, FieldMemOperand(func, JSFunction::kCodeEntryOffset));
702 __ Ldr(jssp, MemOperand(csp));
718 __ Ldr(temp, FieldMemOperand(func, JSFunction::kContextOffset))
[all...] |
| /art/compiler/linker/arm/ |
| relative_patcher_thumb2.cc | 113 // Check that the next instruction matches the expected LDR.
120 // LDR (immediate), encoding T3, with correct base_reg.
127 // LDR (immediate), encoding T1, with correct base_reg.
137 // LDR (register) with correct base_reg, S=1 and option=011 (LDR Wt, [Xn, Xm, LSL #2]).
149 // LDR (immediate), encoding T3, with correct root_reg.
155 // LDR (immediate), encoding T1, with correct root_reg.
187 __ Ldr(ip, lock_word);
217 __ Ldr(entrypoint, MemOperand(tr, entry_point_offset));
227 // and return to the LDR instruction to load the reference. Otherwise, use introspectio
[all...] |
| /external/v8/src/regexp/arm64/ |
| regexp-macro-assembler-arm64.cc | 167 __ Ldr(w10, register_location(reg));
266 __ Ldr(w10, MemOperand(backtrack_stackpointer()));
764 __ Ldr(x10, MemOperand(x10));
834 __ Ldr(backtrack_stackpointer(), MemOperand(frame_pointer(), kStackBase));
[all...] |
| /external/v8/src/full-codegen/arm64/ |
| full-codegen-arm64.cc | 139 __ Ldr(x11, FieldMemOperand(x1, JSFunction::kFeedbackVectorOffset));
140 __ Ldr(x11, FieldMemOperand(x11, Cell::kValueOffset));
141 __ Ldr(x10, FieldMemOperand(
237 __ Ldr(x10, MemOperand(fp, parameter_offset));
273 __ Ldr(x1, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
346 __ Ldr(x3, FieldMemOperand(x2, Cell::kValueOffset));
458 __ Ldr(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
689 __ Ldr(dest, location);
740 __ Ldr(x1, FieldMemOperand(cp, HeapObject::kMapOffset));
[all...] |
