OpenGrok
Home
Sort by relevance
Sort by last modified time
Full Search
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:MPU
(Results
1 - 7
of
7
) sorted by null
/device/google/contexthub/firmware/os/platform/stm32/
mpu.c
22
#include <
mpu
.h>
98
MPU
->RNR = regionNo;
99
MPU
->RASR = 0; /* disable region before changing it */
100
MPU
->RBAR = proposedStart;
101
MPU
->RASR = MPU_SRD_BITS | MPU_BIT_ENABLE | attrs | ((lenVal-1) << 1);
122
MPU
->CTRL = 0x00; // disable
MPU
136
//
MPU
on, even during faults, supervisor default: allow, user default: default deny
137
MPU
->CTRL = MPU_CTRL_ENABLE_Msk | MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk;
153
int i, regions = (
MPU
->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos
[
all
...]
/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
core_cm0plus.h
221
- Core
MPU
Register
503
\defgroup CMSIS_MPU Memory Protection Unit (
MPU
)
504
\brief Type definitions for the Memory Protection Unit (
MPU
)
508
/** \brief Structure type to access the Memory Protection Unit (
MPU
).
512
__I uint32_t TYPE; /*!< Offset: 0x000 (R/ )
MPU
Type Register */
513
__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W)
MPU
Control Register */
514
__IO uint32_t RNR; /*!< Offset: 0x008 (R/W)
MPU
Region RNRber Register */
515
__IO uint32_t RBAR; /*!< Offset: 0x00C (R/W)
MPU
Region Base Address Register */
516
__IO uint32_t RASR; /*!< Offset: 0x010 (R/W)
MPU
Region Attribute and Size Register */
519
/*
MPU
Type Register *
[
all
...]
core_sc000.h
216
- Core
MPU
Register
522
\defgroup CMSIS_MPU Memory Protection Unit (
MPU
)
523
\brief Type definitions for the Memory Protection Unit (
MPU
)
527
/** \brief Structure type to access the Memory Protection Unit (
MPU
).
531
__I uint32_t TYPE; /*!< Offset: 0x000 (R/ )
MPU
Type Register */
532
__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W)
MPU
Control Register */
533
__IO uint32_t RNR; /*!< Offset: 0x008 (R/W)
MPU
Region RNRber Register */
534
__IO uint32_t RBAR; /*!< Offset: 0x00C (R/W)
MPU
Region Base Address Register */
535
__IO uint32_t RASR; /*!< Offset: 0x010 (R/W)
MPU
Region Attribute and Size Register */
538
/*
MPU
Type Register *
[
all
...]
core_cm3.h
217
- Core
MPU
Register
[
all
...]
core_cm4.h
263
- Core
MPU
Register
[
all
...]
core_sc300.h
217
- Core
MPU
Register
[
all
...]
core_cm7.h
278
- Core
MPU
Register
[
all
...]
Completed in 160 milliseconds