| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 55 ORR r4,r4,r5,LSL #24
58 ORR r8,r8,r9,LSL #24
65 ORR r4,r4,r5,LSL #24
68 ORR r8,r8,r9,LSL #24
77 ORR r4,r4,r5,LSL #16
80 ORR r8,r8,r9,LSL #16
87 ORR r4,r4,r5,LSL #16
90 ORR r8,r8,r9,LSL #16
99 ORR r4,r4,r5,LSL #8
102 ORR r8,r8,r9,LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.S | 51 ORR r7,r7,r10,LSL #24
53 ORR r10,r10,r11,LSL #24
63 ORR r7,r7,r10,LSL #16
65 ORR r10,r10,r11,LSL #16
75 ORR r7,r7,r10,LSL #8
77 ORR r10,r10,r11,LSL #8
107 ORR r7,r10,r7,LSR #8
116 ORR r7,r10,r7,LSR #16
125 ORR r7,r10,r7,LSR #24
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.S | 51 ORR r11,r10,r11,LSL #8
52 ORR r10,r4,r5,LSL #8
83 ORR r11,r10,r11,LSL #8
84 ORR r10,r4,r5,LSL #8
105 ORR r11,r10,r11,LSL #8
106 ORR r10,r4,r5,LSL #8
|
| armVCM4P10_Average_4x_Align_unsafe_s.S | 71 ORR r10,r10,r4,LSL #16
73 ORR r11,r11,r5,LSL #16
89 ORR r10,r10,r4,LSL #16
91 ORR r11,r11,r5,LSL #16
113 ORR r10,r10,r4,LSL #8
115 ORR r11,r11,r5,LSL #8
131 ORR r10,r10,r4,LSL #8
133 ORR r11,r11,r5,LSL #8
|
| /external/arm-neon-tests/ |
| InitCache.s | 19 ORR r0, r0, #(0x1 <<12) ; enable I Cache
21 ORR r0, r0, #(0x1 <<2) ; enable D Cache
23 ORR r0, r0, #0x1 ; enable MMU
31 ORR r0, r0, #2 ; L2EN bit, enable L2 cache
33 ;ORR r0, r0, #(0x1 << 4) ;Enables speculative accesses on AXI
34 ORR r0, r0, #(0x1 << 4) ;Enables speculative accesses on AXI
35 ORR r0, r0, #(0x1 << 5) ;Enables caching NEON data within the L1 data cache
43 ORR r0, r0, #(0x1 <<11) ; Enable all forms of branch prediction
|
| /external/aac/libSBRdec/src/arm/ |
| env_calc_arm.cpp | 128 ORR r0, r0, r4
129 ORR r0, r0, r5
136 ORR r0, r0, r4
137 ORR r0, r0, r5
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_Interpolate_Chroma_s.s | 136 ORR iWidth, iWidth, temp, LSL #16
167 ORR x01x00, x00, x01, LSL #16
169 ORR x02x01, x01, x02, LSL #16
171 ORR x11x10, x10, x11, LSL #16
172 ORR x12x11, x11, x12, LSL #16
194 ORR OutRow0100, OutRow00, OutRow01, LSL #8
204 ORR x21x20, x20, x21, LSL #16
205 ORR x22x21, x21, x22, LSL #16
221 ORR OutRow1110, OutRow10, OutRow11, LSL #8
236 ORR iWidth, iWidth, temp, LSL #1
[all...] |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 92 ORR x0, x0, x1, LSL #24
95 ORR x2, x2, x3, LSL #24
102 ORR x0, x0, x1, LSL #24
105 ORR x2, x2, x3, LSL #24
115 ORR x0, x0, x1, LSL #16
118 ORR x2, x2, x3, LSL #16
126 ORR x0, x0, x1, LSL #16
129 ORR x2, x2, x3, LSL #16
139 ORR x0, x0, x1, LSL #8
142 ORR x2, x2, x3, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 108 ORR x0, x0, x1, LSL #24
110 ORR x1, x1, x2, LSL #24
124 ORR x0, x0, x1, LSL #16
126 ORR x1, x1, x2, LSL #16
140 ORR x0, x0, x1, LSL #8
142 ORR x1, x1, x2, LSL #8
209 ORR x0, x1, x0, LSR #8
222 ORR x0, x1, x0, LSR #16
235 ORR x0, x1, x0, LSR #24
|
| omxVCM4P10_PredictIntra_4x4_s.s | 324 ORR Out0, tVal6, tVal11 ;// {U3, f2, f1, f0 }
343 ORR tVal8, tVal8, Above4567, LSL #8 ;// {U6, U5, U4, U3 }
344 ORR tVal10, tVal10, Above4567, LSL #24 ;// {U4, U3, U2, U1 }
361 ORR Out3, tVal9, Out2, LSR #8 ;// {f6, f5, f4, f3 }
379 ORR tVal7, Left1, Left0, LSL #8 ;// tVal7 = 00 00 L0 L1
382 ORR tVal8, Left3, Left2, LSL #8 ;// tVal8 = 00 00 L2 L3
386 ORR tVal8, tVal8, AboveLeft ;// tVal8 = U2 U1 U0 UL
387 ORR tVal9, tVal9, AboveLeft, LSL #24 ;// tVal9 = UL L0 L1 L2
390 ORR tVal10, tVal10, tVal9, LSR #8 ;// tVal10= U0 UL L0 L1
391 ORR tVal11, tVal11, tVal8, LSL #8 ;// tVal11= U1 U0 UL L
[all...] |
| armVCM4P10_Average_4x_Align_unsafe_s.s | 143 ORR iPredA0, iPredA0, Temp1, LSL #16
145 ORR iPredA1, iPredA1, Temp2, LSL #16
165 ORR iPredA0, iPredA0, Temp1, LSL #16
167 ORR iPredA1, iPredA1, Temp2, LSL #16
199 ORR iPredA0, iPredA0, Temp1, LSL #8
201 ORR iPredA1, iPredA1, Temp2, LSL #8
220 ORR iPredA0, iPredA0, Temp1, LSL #8
222 ORR iPredA1, iPredA1, Temp2, LSL #8
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 105 ORR ValueA1, Temp3, Temp4, LSL #8
106 ORR ValueA0, Temp1, Temp2, LSL #8
145 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
146 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
173 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
174 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
|
| /prebuilts/go/darwin-x86/src/math/ |
| modf_arm64.s | 16 ORR R0, R1 // must have same sign
|
| /prebuilts/go/linux-x86/src/math/ |
| modf_arm64.s | 16 ORR R0, R1 // must have same sign
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 92 ORR x0, x0, x1, LSL #24
95 ORR x2, x2, x3, LSL #24
102 ORR x0, x0, x1, LSL #24
105 ORR x2, x2, x3, LSL #24
115 ORR x0, x0, x1, LSL #16
118 ORR x2, x2, x3, LSL #16
126 ORR x0, x0, x1, LSL #16
129 ORR x2, x2, x3, LSL #16
139 ORR x0, x0, x1, LSL #8
142 ORR x2, x2, x3, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.s | 108 ORR x0, x0, x1, LSL #24
110 ORR x1, x1, x2, LSL #24
124 ORR x0, x0, x1, LSL #16
126 ORR x1, x1, x2, LSL #16
140 ORR x0, x0, x1, LSL #8
142 ORR x1, x1, x2, LSL #8
209 ORR x0, x1, x0, LSR #8
222 ORR x0, x1, x0, LSR #16
235 ORR x0, x1, x0, LSR #24
|
| armVCM4P10_Average_4x_Align_unsafe_s.s | 143 ORR iPredA0, iPredA0, Temp1, LSL #16
145 ORR iPredA1, iPredA1, Temp2, LSL #16
165 ORR iPredA0, iPredA0, Temp1, LSL #16
167 ORR iPredA1, iPredA1, Temp2, LSL #16
199 ORR iPredA0, iPredA0, Temp1, LSL #8
201 ORR iPredA1, iPredA1, Temp2, LSL #8
220 ORR iPredA0, iPredA0, Temp1, LSL #8
222 ORR iPredA1, iPredA1, Temp2, LSL #8
|
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 105 ORR ValueA1, Temp3, Temp4, LSL #8
106 ORR ValueA0, Temp1, Temp2, LSL #8
145 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
146 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
173 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0]
174 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0]
|
| /external/boringssl/src/ssl/test/runner/poly1305/ |
| sum_arm.s | 36 ORR R3<<6, R9, R9
37 ORR R4<<12, g, g
38 ORR R5<<18, R11, R11
114 ORR R1<<6, g, g
115 ORR R2<<12, R11, R11
116 ORR R3<<18, R12, R12
124 ORR R3, R4, R4
171 ORR R11<<6, R12, R12
172 ORR R5<<6, R14, R14
181 ORR R1<<6, R12, R1
[all...] |
| /prebuilts/go/darwin-x86/src/vendor/golang_org/x/crypto/poly1305/ |
| sum_arm.s | 36 ORR R3<<6, R9, R9
37 ORR R4<<12, g, g
38 ORR R5<<18, R11, R11
114 ORR R1<<6, g, g
115 ORR R2<<12, R11, R11
116 ORR R3<<18, R12, R12
124 ORR R3, R4, R4
171 ORR R11<<6, R12, R12
172 ORR R5<<6, R14, R14
181 ORR R1<<6, R12, R1
[all...] |
| /prebuilts/go/linux-x86/src/vendor/golang_org/x/crypto/poly1305/ |
| sum_arm.s | 36 ORR R3<<6, R9, R9
37 ORR R4<<12, g, g
38 ORR R5<<18, R11, R11
114 ORR R1<<6, g, g
115 ORR R2<<12, R11, R11
116 ORR R3<<18, R12, R12
124 ORR R3, R4, R4
171 ORR R11<<6, R12, R12
172 ORR R5<<6, R14, R14
181 ORR R1<<6, R12, R1
[all...] |
| /prebuilts/go/darwin-x86/src/runtime/ |
| memmove_arm.s | 196 ORR BR3>>RSHIFT, BW3
199 ORR BR2>>RSHIFT, BW2
202 ORR BR1>>RSHIFT, BW1
205 ORR BR0>>RSHIFT, BW0
244 ORR FR0<<LSHIFT, FW0
247 ORR FR1<<LSHIFT, FW1
250 ORR FR2<<LSHIFT, FW2
253 ORR FR3<<LSHIFT, FW3
|
| /prebuilts/go/linux-x86/src/runtime/ |
| memmove_arm.s | 196 ORR BR3>>RSHIFT, BW3
199 ORR BR2>>RSHIFT, BW2
202 ORR BR1>>RSHIFT, BW1
205 ORR BR0>>RSHIFT, BW0
244 ORR FR0<<LSHIFT, FW0
247 ORR FR1<<LSHIFT, FW1
250 ORR FR2<<LSHIFT, FW2
253 ORR FR3<<LSHIFT, FW3
|
| /system/core/libpixelflinger/codeflinger/ |
| load_store.cpp | 84 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 8));
86 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 16));
91 ORR(AL, 0, s1, s1, reg_imm(s0, LSL, 8));
93 ORR(AL, 0, s.reg, s1, reg_imm(s0, LSL, 16));
212 ORR(AL, 0, d, d, reg_imm(d, LSR, sbits));
222 ORR(AL, 0, d, s, reg_imm(s, LSL, sbits));
350 ORR(AL, 0, d.reg, d.reg, reg_imm(ireg, LSL, dl));
356 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift));
365 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift));
371 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSL, -shift))
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 115 ORR $out0, $out0, $out1, LSL #(32 - 8 * ($offset))
117 ORR $out1, $out1, $scratch, LSL #(32 - 8 * ($offset))
222 ORR $word3, $word3, $word2, LSL #24
224 ORR $word2, $word2, $word1, LSL #24
229 ORR $word0, $word0, $word2, LSL #8
231 ORR $word1, $word1, $word3, LSL #8
234 ORR $word0, $word0, $word1, LSL #(32 - 8 * ($offset))
236 ORR $word1, $word1, $word2, LSL #(32 - 8 * ($offset))
239 ORR $word3, $word3, $word2, LSL #(32 - 8 * (($offset)+1))
241 ORR $word2, $word2, $word1, LSL #2
[all...] |
