| /art/runtime/arch/arm/ |
| quick_method_frame_info_arm.h | 73 return RoundUp((POPCOUNT(ArmCalleeSaveCoreSpills(type)) /* gprs */ +
74 POPCOUNT(ArmCalleeSaveFpSpills(type)) /* fprs */ +
86 (POPCOUNT(ArmCalleeSaveCoreSpills(type)) +
87 POPCOUNT(ArmCalleeSaveFpSpills(type))) * static_cast<size_t>(kArmPointerSize);
92 POPCOUNT(ArmCalleeSaveCoreSpills(type)) * static_cast<size_t>(kArmPointerSize);
97 POPCOUNT(ArmCalleeSaveCoreSpills(type) & (-(1 << LR))) * static_cast<size_t>(kArmPointerSize);
|
| context_arm.cc | 51 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
58 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
|
| /art/runtime/ |
| method_bss_mapping.h | 44 return bss_offset - POPCOUNT(index_mask >> (16u - diff)) * entry_size;
|
| dex_file_verifier_test.cc | 438 if (POPCOUNT(i) < 2) {
574 if (POPCOUNT(j) < 2) {
813 uint32_t bits = POPCOUNT(kInterfaceDisallowed);
[all...] |
| cha.cc | 130 size_t core_spill_size = POPCOUNT(frame_info.CoreSpillMask()) *
132 size_t fpu_spill_size = POPCOUNT(frame_info.FpSpillMask()) *
|
| /art/runtime/arch/x86/ |
| context_x86.cc | 46 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
51 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
65 POPCOUNT(frame_info.CoreSpillMask()) - 1 + 2 * POPCOUNT(frame_info.FpSpillMask()));
|
| quick_method_frame_info_x86.h | 71 return RoundUp((POPCOUNT(X86CalleeSaveCoreSpills(type)) /* gprs */ +
72 2 * POPCOUNT(X86CalleeSaveFpSpills(type)) /* fprs */ +
|
| /art/runtime/arch/x86_64/ |
| context_x86_64.cc | 45 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
50 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
61 POPCOUNT(frame_info.CoreSpillMask()) - 1 + POPCOUNT(frame_info.FpSpillMask()));
|
| quick_method_frame_info_x86_64.h | 71 return RoundUp((POPCOUNT(X86_64CalleeSaveCoreSpills(type)) /* gprs */ +
72 POPCOUNT(X86_64CalleeSaveFpSpills(type)) /* fprs */ +
|
| /art/runtime/arch/arm64/ |
| quick_method_frame_info_arm64.h | 97 return RoundUp((POPCOUNT(Arm64CalleeSaveCoreSpills(type)) /* gprs */ +
98 POPCOUNT(Arm64CalleeSaveFpSpills(type)) /* fprs */ +
110 (POPCOUNT(Arm64CalleeSaveCoreSpills(type)) +
111 POPCOUNT(Arm64CalleeSaveFpSpills(type))) * static_cast<size_t>(kArm64PointerSize);
116 POPCOUNT(Arm64CalleeSaveCoreSpills(type)) * static_cast<size_t>(kArm64PointerSize);
121 POPCOUNT(Arm64CalleeSaveCoreSpills(type) & (-(1 << LR))) *
|
| context_arm64.cc | 51 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
58 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
|
| /art/runtime/arch/mips/ |
| context_mips.cc | 48 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
55 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
|
| quick_method_frame_info_mips.h | 82 return RoundUp((POPCOUNT(MipsCalleeSaveCoreSpills(type)) /* gprs */ +
83 POPCOUNT(MipsCalleeSaveFPSpills(type)) /* fprs */ +
|
| /art/runtime/arch/mips64/ |
| context_mips64.cc | 48 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
55 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
|
| quick_method_frame_info_mips64.h | 89 return RoundUp((POPCOUNT(Mips64CalleeSaveCoreSpills(type)) /* gprs */ +
90 POPCOUNT(Mips64CalleeSaveFpSpills(type)) /* fprs */ +
|
| /art/runtime/base/ |
| bit_utils_test.cc | 62 static_assert(0 == POPCOUNT<uint32_t>(0u), "TestPOPCOUNT32#1");
63 static_assert(1 == POPCOUNT<uint32_t>(8u), "TestPOPCOUNT32#2");
64 static_assert(15 == POPCOUNT<uint32_t>(0x55555554u), "TestPOPCOUNT32#3");
65 static_assert(16 == POPCOUNT<uint32_t>(0xaaaaaaaau), "TestPOPCOUNT32#4");
66 static_assert(31 == POPCOUNT<uint32_t>(0xfffffffeu), "TestPOPCOUNT32#5");
67 static_assert(32 == POPCOUNT<uint32_t>(0xffffffffu), "TestPOPCOUNT32#6");
69 static_assert(0 == POPCOUNT<uint64_t>(UINT64_C(0)), "TestPOPCOUNT64#1");
70 static_assert(1 == POPCOUNT<uint64_t>(UINT64_C(0x40000)), "TestPOPCOUNT64#2");
71 static_assert(16 == POPCOUNT<uint64_t>(UINT64_C(0x1414141482828282)), "TestPOPCOUNT64#3");
72 static_assert(31 == POPCOUNT<uint64_t>(UINT64_C(0x0000ffff00007fff)), "TestPOPCOUNT64#4")
[all...] |
| bit_vector.cc | 235 count += POPCOUNT(storage_[word]);
321 count += POPCOUNT(storage[word]);
324 count += POPCOUNT(storage[word_end] & ~(0xffffffffu << partial_word_bits));
|
| bit_utils.h | 83 constexpr int POPCOUNT(T x) {
|
| /art/compiler/utils/arm/ |
| jni_macro_assembler_arm_vixl.cc | 75 cfi().AdjustCFAOffset(POPCOUNT(core_spill_mask) * kFramePointerSize);
81 DCHECK_EQ(fp_spill_mask >> CTZ(fp_spill_mask), ~0u >> (32 - POPCOUNT(fp_spill_mask)));
83 ___ Vpush(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask)));
84 cfi().AdjustCFAOffset(POPCOUNT(fp_spill_mask) * kFramePointerSize);
89 int pushed_values = POPCOUNT(core_spill_mask) + POPCOUNT(fp_spill_mask);
135 int pop_values = POPCOUNT(core_spill_mask) + POPCOUNT(fp_spill_mask);
143 DCHECK_EQ(fp_spill_mask >> CTZ(fp_spill_mask), ~0u >> (32 - POPCOUNT(fp_spill_mask)));
145 ___ Vpop(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask)))
[all...] |
| assembler_arm_vixl.cc | 369 int number_of_regs = POPCOUNT(static_cast<uint32_t>(regs));
390 int number_of_regs = POPCOUNT(static_cast<uint32_t>(regs));
|
| /art/compiler/optimizing/ |
| code_generator.h | 272 return POPCOUNT(core_callee_save_mask_);
309 return POPCOUNT(GetSlowPathSpills(locations, core_registers));
634 return POPCOUNT(fpu_spill_mask_) * GetFloatingPointSpillSlotSize();
638 return POPCOUNT(core_spill_mask_) * GetWordSize();
643 return (POPCOUNT(allocated_registers_.GetCoreRegisters() & core_callee_save_mask_) != 1)
644 || (POPCOUNT(allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_) != 0);
[all...] |
| locations.h | 469 return POPCOUNT(core_registers_) + POPCOUNT(floating_point_registers_);
|
| /art/runtime/interpreter/ |
| interpreter_intrinsics.cc | 68 UNARY_INTRINSIC(MterpIntegerBitCount, POPCOUNT, GetVReg, SetI);
101 UNARY_INTRINSIC(MterpLongBitCount, POPCOUNT, GetVRegLong, SetI);
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| rtl.def | 632 DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 50 POPCOUNT,
|
