| /external/clang/test/SemaTemplate/ |
| nested-name-spec-template.cpp | 7 template<typename T> struct Promote;
9 template<> struct Promote<short> {
13 template<> struct Promote<int> {
17 template<> struct Promote<float> {
21 Promote<short>::type *ret_intptr(int* ip) { return ip; }
22 Promote<int>::type *ret_intptr2(int* ip) { return ip; }
25 M::Promote<int>::type *ret_intptr3(int* ip) { return ip; }
26 M::template Promote<int>::type *ret_intptr4(int* ip) { return ip; }
31 M::template Promote<int> pi;
37 N::M::Promote<int>::type *ret_intptr5(int* ip) { return ip;
[all...] |
| /external/drm_hwcomposer/ |
| glworker.h | 63 bool Promote();
|
| glworker.cpp | 712 bool GLWorkerCompositor::CachedFramebuffer::Promote() {
715 strong_framebuffer = weak_framebuffer.promote();
733 if (cached_framebuffer->Promote()) {
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| toy.ml | 33 (* Promote allocas to registers. *)
|
| /external/swiftshader/third_party/LLVM/examples/OCaml-Kaleidoscope/Chapter7/ |
| toy.ml | 33 (* Promote allocas to registers. *)
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 56 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
57 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
58 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
68 setOperationAction(ISD::AND, MVT::i16, Promote);
69 setOperationAction(ISD::OR, MVT::i16, Promote);
70 setOperationAction(ISD::XOR, MVT::i16, Promote);
71 setOperationAction(ISD::CTPOP, MVT::i16, Promote);
72 // The expansion of CTLZ/CTTZ uses AND/OR, so we might as well promote
74 setOperationAction(ISD::CTLZ, MVT::i16, Promote);
75 setOperationAction(ISD::CTTZ, MVT::i16, Promote);
[all...] |
| /art/runtime/jdwp/ |
| object_registry.h | 60 // also promote references to regular JNI global references (and demote them back again if
123 void Promote(ObjectRegistryEntry& entry)
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| object_registry.cc | 209 Promote(*it->second);
231 void ObjectRegistry::Promote(ObjectRegistryEntry& entry) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 116 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
117 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
118 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
300 setOperationAction(ISD::CTLZ , MVT::i8, Promote);
301 setOperationAction(ISD::CTLZ , MVT::i16, Promote);
325 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote);
326 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote);
327 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote);
328 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
343 setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 91 Promote, // This operation should be executed in a larger type.
214 // The default action for other vectors is to promote
286 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
488 /// legal (return 'Legal') or we need to promote it to a larger type (return
489 /// 'Promote'), or we need to expand it into multiple registers of smaller
500 /// to promote to. For integer types that are larger than the largest integer
621 getOperationAction(Op, VT) == Promote);
631 getOperationAction(Op, VT) == Promote);
754 assert(Action != Promote && "Can't promote condition code!")
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | 106 Promote, // This operation should be executed in a larger type.
264 // The default action for other vectors is to promote
371 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
613 /// legal (return 'Legal') or we need to promote it to a larger type (return
614 /// 'Promote'), or we need to expand it into multiple registers of smaller
625 /// to promote to. For integer types that are larger than the largest integer
745 getOperationAction(Op, VT) == Promote);
755 getOperationAction(Op, VT) == Promote);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 71 setOperationAction(ISD::LOAD, MVT::f32, Promote);
74 setOperationAction(ISD::LOAD, MVT::v2f32, Promote);
77 setOperationAction(ISD::LOAD, MVT::v4f32, Promote);
80 setOperationAction(ISD::LOAD, MVT::v8f32, Promote);
83 setOperationAction(ISD::LOAD, MVT::v16f32, Promote);
86 setOperationAction(ISD::LOAD, MVT::i64, Promote);
89 setOperationAction(ISD::LOAD, MVT::v2i64, Promote);
92 setOperationAction(ISD::LOAD, MVT::f64, Promote);
95 setOperationAction(ISD::LOAD, MVT::v2f64, Promote);
110 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 512 setOperationAction(ISD::LOAD, VT, Promote);
515 setOperationAction(ISD::STORE, VT, Promote);
740 // Promote the value if needed.
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| TargetLowering.h | 92 Promote, // This operation should be executed in a larger type.
261 /// it is already legal (return 'Legal') or we need to promote it to a larger
262 /// type (return 'Promote'), or we need to expand it into multiple registers
273 /// returns the larger type to promote to. For integer types that are larger
481 assert(Action != Promote && "Can't promote condition code!");
493 /// getTypeToPromoteTo - If the action for this operation is to promote, this
494 /// method returns the ValueType to promote to.
496 assert(getOperationAction(Op, VT) == Promote &&
512 "Didn't find type to promote to!")
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 63 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
64 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
65 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
113 setOperationAction(ISD::CTLZ, MVT::i32, Promote);
411 // Promote the value if needed.
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 261 // f16 is a storage-only type, always promote it to f32.
262 setOperationAction(ISD::SETCC, MVT::f16, Promote);
263 setOperationAction(ISD::BR_CC, MVT::f16, Promote);
264 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote);
265 setOperationAction(ISD::SELECT, MVT::f16, Promote);
266 setOperationAction(ISD::FADD, MVT::f16, Promote);
267 setOperationAction(ISD::FSUB, MVT::f16, Promote);
268 setOperationAction(ISD::FMUL, MVT::f16, Promote);
269 setOperationAction(ISD::FDIV, MVT::f16, Promote);
270 setOperationAction(ISD::FREM, MVT::f16, Promote);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 115 SDValue Promote(SDValue Op);
354 case TargetLowering::Promote:
355 Result = Promote(Op);
383 SDValue VectorLegalizer::Promote(SDValue Op) {
389 // "Promote" the operation by extending the operand.
393 // Promote the operation by extending the operand.
404 "Can't promote a vector with multiple results!");
437 "Can't promote a vector with multiple results!");
439 // Normal getTypeToPromoteTo() doesn't work here, as that will promote
464 // For FP_TO_INT we promote the result type to a vector type with wide
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 114 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
115 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);
116 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
272 // Promote the value if needed.
|
