HomeSort by relevance Sort by last modified time
    Searched refs:RCI (Results 1 - 25 of 49) sorted by null

1 2

  /external/swiftshader/third_party/LLVM/lib/CodeGen/
RegisterClassInfo.cpp 71 RCInfo &RCI = RegClass[RC->getID()];
76 if (!RCI.Order)
77 RCI.Order.reset(new unsigned[NumRegs]);
94 RCI.Order[N++] = PhysReg;
96 RCI.NumRegs = N + CSRAlias.size();
97 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
100 std::copy(CSRAlias.begin(), CSRAlias.end(), &RCI.Order[N]);
104 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs)
105 RCI.ProperSubClass = true;
109 for (unsigned I = 0; I != RCI.NumRegs; ++I
    [all...]
AllocationOrder.cpp 28 : Begin(0), End(0), Pos(0), RCI(RegClassInfo), OwnedBegin(false) {
55 if (!RCI.isReserved(Order[i]))
65 ArrayRef<unsigned> O = RCI.getOrder(RC);
72 !RC->contains(Hint) || RCI.isReserved(Hint)))
AllocationOrder.h 29 const RegisterClassInfo &RCI;
RegisterClassInfo.h 65 const RCInfo &RCI = RegClass[RC->getID()];
66 if (Tag != RCI.Tag)
68 return RCI;
AggressiveAntiDepBreaker.h 134 const RegisterClassInfo &RCI,
  /external/llvm/lib/CodeGen/
RegisterClassInfo.cpp 81 RCInfo &RCI = RegClass[RC->getID()];
86 if (!RCI.Order)
87 RCI.Order.reset(new MCPhysReg[NumRegs]);
112 RCI.Order[N++] = PhysReg;
116 RCI.NumRegs = N + CSRAlias.size();
117 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
125 RCI.Order[N++] = PhysReg;
130 if (StressRA && RCI.NumRegs > StressRA)
131 RCI.NumRegs = StressRA;
136 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs
    [all...]
TargetRegisterInfo.cpp 217 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI)
218 if (RCI.getSubReg() == Idx)
221 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this);
AggressiveAntiDepBreaker.h 128 const RegisterClassInfo &RCI,
ShrinkWrap.cpp 101 RegisterClassInfo RCI;
161 RCI.runOnMachineFunction(MF);
238 UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
  /external/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 71 const RCInfo &RCI = RegClass[RC->getID()];
72 if (Tag != RCI.Tag)
74 return RCI;
RegisterPressure.h 343 const RegisterClassInfo *RCI;
381 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
385 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
390 void init(const MachineFunction *mf, const RegisterClassInfo *rci,
  /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 75 const RCInfo &RCI = RegClass[RC->getID()];
76 if (Tag != RCI.Tag)
78 return RCI;
  /external/llvm/lib/Transforms/Scalar/
ConstantHoisting.cpp 149 for (auto const &RCI : ConstInfo.RebasedConstants)
150 for (auto const &U : RCI.Uses)
561 for (auto const &RCI : ConstInfo.RebasedConstants) {
563 for (auto const &U : RCI.Uses)
564 emitBaseConstants(Base, RCI.Offset, U);
  /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Analysis/
CGSCCPassManager.h 338 for (auto RCI = CG.postorder_ref_scc_begin(),
340 RCI != RCE;) {
354 RCWorklist.insert(&*RCI++);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Analysis/
CGSCCPassManager.h 338 for (auto RCI = CG.postorder_ref_scc_begin(),
340 RCI != RCE;) {
354 RCWorklist.insert(&*RCI++);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Analysis/
CGSCCPassManager.h 338 for (auto RCI = CG.postorder_ref_scc_begin(),
340 RCI != RCE;) {
354 RCWorklist.insert(&*RCI++);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Analysis/
CGSCCPassManager.h 338 for (auto RCI = CG.postorder_ref_scc_begin(),
340 RCI != RCE;) {
354 RCWorklist.insert(&*RCI++);
    [all...]
  /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Analysis/
CGSCCPassManager.h 338 for (auto RCI = CG.postorder_ref_scc_begin(),
340 RCI != RCE;) {
354 RCWorklist.insert(&*RCI++);
    [all...]

Completed in 1609 milliseconds

1 2